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My DSP frequency was changed when I start application from FLASH memory (OMAP-L138 LCDK)

Other Parts Discussed in Thread: SYSBIOS, OMAPL138

I flashed my DSP project into the FLASH memory with the StarterWare bootloader. My project uses UART port which sends data when I push a button on the board. The speed of the UART port is 115200 and when I start my application in debug mode everything seems fine. But if I measure the UART speed when my application starts from the FLASH memory the speed doesn't match the expected value: I've got about 75500 instead.

It seems like the clock frequency of DSP became slower. My DSP project works with SYSBIOS and I thought BIOS configures clock frequency itself.

What is the problem?

  • By default, OMAP is running at 300MHz.
    Have you modified the OMAP frequency in your project (456MHz or any other freq) ?
    How did you confirm that ?
    Can you please measure the OMAP frequency via CLKOUT pin ?
  •  Do you mean that pin?

    I haven't got anything at TEST POINT 10 - just a constant level.

  • Yes. I meant that pin only.
    It seems to be you haven't enabled the PINMUX for that pin. (PINMUX13_7_4)

    Already I've done this and able to probe the all the SYSCLK via this CLKOUT pin.
  • Ok, it just show me 24 MHz clock frequency.

    And this absolutely doesn't solve my problem - my project configured for 300 MHz, but I got less.

    If I calculate the approximate working frequency I got the following result:
    300 * (75.5 / 115.2) = 200 MHz
    It seems my DSP has clock frequency as 200 MHz, not 300.
    Ans the main question: why??

    As I understand the problem is in bootloader, not in a DSP program: when I start my program with a debugger on a board wich has the Starterware bootloader I've got the same result: 75.5 kHz jn UART. But if I start my program with a debugger on a board wich has the factory bootloader (u-boot) I've got expected speed 115.2 kHz.


  • Ok, it just show me 24 MHz clock frequency.


    Then, I think, its not showing the DSP or OMAP frequency but OSCIN frequency i.e 24MHz.

    OCSEL.OCSRC bit has default value "0x14"

    If you want to probe the particular SYSCLKs then you have to change the PLL0 OCSEL register.
    Ex, if you want to probe the PLL0_SYSCLK1 (DSP frequency) then you have to write "0x17" into OCSEL.OCSRC bits.

    Please refer to the OMAPL138 TRM , page no 159, chapter 8.3.7.

    Let me know if any.

  • Ok, I've just realized that I need to observe PLL0_SYSCLK1.

    This frequency is 300 MHz.

    Is it anything wrong with peripheral clocks?

  • Situation is more interesting than I thought. My UART0 get clocks from PLL0 with fixed division ratio 2 (PLL0_SYSCLK2). So I have DSP frequency / 2 as a clock source. My UART speed settings were incorrect for 300 MHz speed. So my DSP with u-boot was clocked before at frequency more than 300 MHz! And when I get the right frequency speed became less than I expected. So I corrected divisor in UART0 to another value.

    Situation not so clear for UART1 and UART2. As I understand, they both have frequency from another PLL - PLL1 (PLL1_SYSCLK2). I tried to show what the frequency on this PLL by using the OCSEL but it was unsuccessful - I didn't see anything.

  • Tankist,

    Please download PLL programming spreadsheet from below wiki link and refer the UART sheet for better understanding of the peripheral clocking structure. You can play around with the SYSCLK value as well in PLL structure sheet. Let me know if you find any difficulty on this.

    http://processors.wiki.ti.com/index.php/Programming_PLL_Controllers_on_OMAP-L1x8/C674x/AM18xx


    Regards,
    Senthill