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AM5728 External MCASP_AHCLK

Sergey Danilov
Intellectual 650 points

Hello,

Could you please help me out with MCASP external clock

Reading spruhz6e.pdf I found that AHCLKX  is declared as output pin ( Table 24-403. MCASP I/O Signals )

But later I found different information, like this:

24.6.4.2 MCASP Clock and Frame-Sync Configurations

In the third (mixed) scenario, an externally driven (master) high-frequency clock is applied on the AHCLKX (for the TX part) pin, which is configured as input. In this case the AHCLKX clock frequency can be divided down via programming the ACLKX associated divider to produce the necessary bit rate clock. The high-speed clock divider can NOT be used.

Could you please help me with that? 

Is it possible to use external clock generator and feed it to AHCLKX?

If so - what pin should be used to feed the clock into the CPU?

Is there any place to look at schematics example for this kind of MACASP usage (MCASP connected to ADC or DAC and clocked externally)?

Thanks!

  • 0
    TI__Guru**** 393215 points
    Hi,

    The internal and external clocks mentioned in the McASP section are with respect to clock and frame-sync generator modules. The AM572X has a second oscillator, OSC1, which can accept any crystal value in the range 19.2-32MHz, and which can be used as a AHCLKX source for the McASP.
  • 0
    TI__Guru*** 125430 points

    Sergey,

    You've stumbled onto an area that is very subtle on AM57xx.  I spent many hours looking into precisely this sort of question, so let me share some of the conclusions...

    1. Yes, the ahclkx pin is output only (which is unusual, i.e. most other TI devices with McASP allow this to be input or output).
    2. If you would like to externally provide a high speed clock as an input to the AM57xx, the expected method on this particular device is to use one of the xref_clk pins.  For example, let's say you're attempting to use xref_clk2 as the high speed clock input to McASP3...  In that case you would program CM_L4PER2_MCASP3_CLKCTRL[27:24] CLKSEL_AHCLKX with a value of 0xA to select xref_clk2.
    3. Each of the McASP instances has two different functional clocks.  For example, if I take McASP3 as an example, it has MCASP3_AHCLKX and MCASP3_AUX_GFCLK provided by the PRCM.  It's important to understand that the mcaspi_ahclkx signals are only capable of outputting the clock signal that comes from the MCASPi_AUX_GFCLK.  Here's a marked up diagram to help illustrate the point:

    The AUXCLK signal in the diagram above comes from the MCASPi_AUX_GFCLK internal clock signal, and that's the only source that can be used for driving an output.  The other signal which I labeled "From PRCM" is the MCASPi_AHCLKX signal.  You can see that it does not connect to the signal going to the ball.  You can also see that it feeds directly to the CLKX generation (i.e. it does not pass through HCLKXDIV like AUXCLK).

    Sergey Danilov said:
    If so - what pin should be used to feed the clock into the CPU?

    One of the xref_clk pins should do nicely.