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Need help with custom lcd display

Other Parts Discussed in Thread: AM3354, DA8XX

We had a custom tft lcd display driver working just fine on sdk 7 (linux 3.12) .    The driver simply sends the spi messages to initialize the display.   We install it in the spi node of the device tree.   We have updated our kernel to 4.1, and have updated the driver to match the style of panel-nec-nl8048hl11.c, which was the starting point for our original driver too.  Our new board is based on the beaglebone, and is using the am3354

The devicetree has lcdc node, and the spi node, however I am not getting any display (backlight is on) and am getting an error in dmesg:

[ 1.261127] panel-cordial-ct040blp32 spi1.0: failed to find video source
[ 1.267895] panel-cordial-ct040blp32: probe of spi1.0 failed with error -22

there are also many messages similar to this one, which may be relevant so I include it here just in case. DRM is turned off in the kernel config.

[    5.266453] drm_kms_helper: Unknown symbol drm_framebuffer_cleanup (err 0)      

I'm suspecting that the problem is in the dts configuration, here is how the dts is setup (based on am335x-boneblack.dts)  can someone please advise me on how to get this working again?

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "TI AM335x KV3";
	compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";

	wlan_en_reg: fixedregulator@1 {
		compatible = "regulator-fixed";
		regulator-name = "wlan-en-regulator";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&ldo3_reg {
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-always-on;
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&wlan_en_reg>;
	bus-width = <4>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mmc1_pins_default &wlan_pins_default>;
	pinctrl-1 = <&mmc1_pins_sleep &wlan_pins_sleep>;
	ti,non-removable;
	ti,needs-special-hs-handling;
	cap-power-off-card;
	keep-power-in-suspend;

	/* Override defaults from bone-common */
	cd-gpios = <>; /* no card detect */

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@0 {
		compatible = "ti,wl1831";
		reg = <2>;
		interrupt-parent = <&gpio1>;
		interrupts = <16 IRQ_TYPE_EDGE_RISING>;
	};
};

&mmc2 {
	vmmc-supply = <&vmmcsd_fixed>;
	pinctrl-names = "default";
	pinctrl-0 = <&emmc_pins>;
	bus-width = <8>;
	status = "okay";
};

&sgx {
	status = "okay";
};

&am33xx_pinmux {
lcd_pins_default: lcd_pins_default {
	pinctrl-single,pins = <
		0xe0 ( PIN_OUTPUT | MUX_MODE0 ) /* (U5) lcd_vsync.lcd_vsync */
		0xe4 ( PIN_OUTPUT | MUX_MODE0 ) /* (R5) lcd_hsync.lcd_hsync */
		0xe8 ( PIN_OUTPUT | MUX_MODE0 ) /* (V5) lcd_pclk.lcd_pclk */
		0xec ( PIN_OUTPUT | MUX_MODE0 ) /* (R6) lcd_ac_bias_en.lcd_ac_bias_en */
		0xa0 ( PIN_OUTPUT | MUX_MODE0 ) /* (R1) lcd_data0.lcd_data0 */
		0xa4 ( PIN_OUTPUT | MUX_MODE0 ) /* (R2) lcd_data1.lcd_data1 */
		0xa8 ( PIN_OUTPUT | MUX_MODE0 ) /* (R3) lcd_data2.lcd_data2 */
		0xac ( PIN_OUTPUT | MUX_MODE0 ) /* (R4) lcd_data3.lcd_data3 */
		0xb0 ( PIN_OUTPUT | MUX_MODE0 ) /* (T1) lcd_data4.lcd_data4 */
		0xb4 ( PIN_OUTPUT | MUX_MODE0 ) /* (T2) lcd_data5.lcd_data5 */
		0xb8 ( PIN_OUTPUT | MUX_MODE0 ) /* (T3) lcd_data6.lcd_data6 */
		0xbc ( PIN_OUTPUT | MUX_MODE0 ) /* (T4) lcd_data7.lcd_data7 */
		0xc0 ( PIN_OUTPUT | MUX_MODE0 ) /* (U1) lcd_data8.lcd_data8 */
		0xc4 ( PIN_OUTPUT | MUX_MODE0 ) /* (U2) lcd_data9.lcd_data9 */
		0xc8 ( PIN_OUTPUT | MUX_MODE0 ) /* (U3) lcd_data10.lcd_data10 */
		0xcc ( PIN_OUTPUT | MUX_MODE0 ) /* (U4) lcd_data11.lcd_data11 */
		0xd0 ( PIN_OUTPUT | MUX_MODE0 ) /* (V2) lcd_data12.lcd_data12 */
		0xd4 ( PIN_OUTPUT | MUX_MODE0 ) /* (V3) lcd_data13.lcd_data13 */
		0xd8 ( PIN_OUTPUT | MUX_MODE0 ) /* (V4) lcd_data14.lcd_data14 */
		0xdc ( PIN_OUTPUT | MUX_MODE0 ) /* (T5) lcd_data15.lcd_data15 */
		0x3c ( PIN_OUTPUT | MUX_MODE1 ) /* (U13) gpmc_ad15.lcd_data16 */
		0x38 ( PIN_OUTPUT | MUX_MODE1 ) /* (V13) gpmc_ad14.lcd_data17 */
		0x34 ( PIN_OUTPUT | MUX_MODE1 ) /* (R12) gpmc_ad13.lcd_data18 */
		0x30 ( PIN_OUTPUT | MUX_MODE1 ) /* (T12) gpmc_ad12.lcd_data19 */
		0x2c ( PIN_OUTPUT | MUX_MODE1 ) /* (U12) gpmc_ad11.lcd_data20 */
		0x28 ( PIN_OUTPUT | MUX_MODE1 ) /* (T11) gpmc_ad10.lcd_data21 */
		0x24 ( PIN_OUTPUT | MUX_MODE1 ) /* (T10) gpmc_ad9.lcd_data22 */
		0x20 ( PIN_OUTPUT | MUX_MODE1 ) /* (U10) gpmc_ad8.lcd_data23 */
	>;
};


/* Optional sleep pin settings. Must manually enter values in the below skeleton. */
lcd_pins_sleep: lcd_pins_sleep {
	pinctrl-single,pins = <
		0xe0 ( PIN_INPUT | MUX_MODE0 ) /* (U5) lcd_vsync.lcd_vsync */
		0xe4 ( PIN_INPUT | MUX_MODE0 ) /* (R5) lcd_hsync.lcd_hsync */
		0xe8 ( PIN_INPUT | MUX_MODE0 ) /* (V5) lcd_pclk.lcd_pclk */
		0xec ( PIN_INPUT | MUX_MODE0 ) /* (R6) lcd_ac_bias_en.lcd_ac_bias_en */
		0xa0 ( PIN_INPUT | MUX_MODE0 ) /* (R1) lcd_data0.lcd_data0 */
		0xa4 ( PIN_INPUT | MUX_MODE0 )  /* (R2) lcd_data1.lcd_data1 */
		0xa8 ( PIN_INPUT | MUX_MODE0 ) /* (R3) lcd_data2.lcd_data2 */
		0xac ( PIN_INPUT | MUX_MODE0 ) /* (R4) lcd_data3.lcd_data3 */
		0xb0 ( PIN_INPUT | MUX_MODE0 ) /* (T1) lcd_data4.lcd_data4 */
		0xb4 ( PIN_INPUT | MUX_MODE0 ) /* (T2) lcd_data5.lcd_data5 */
		0xb8 ( PIN_INPUT | MUX_MODE0 ) /* (T3) lcd_data6.lcd_data6 */
		0xbc ( PIN_INPUT | MUX_MODE0 ) /* (T4) lcd_data7.lcd_data7 */
		0xc0 ( PIN_INPUT | MUX_MODE0 ) /* (U1) lcd_data8.lcd_data8 */
		0xc4 ( PIN_INPUT | MUX_MODE0 ) /* (U2) lcd_data9.lcd_data9 */
		0xc8 ( PIN_INPUT | MUX_MODE0 ) /* (U3) lcd_data10.lcd_data10 */
		0xcc ( PIN_INPUT | MUX_MODE0 ) /* (U4) lcd_data11.lcd_data11 */
		0xd0 ( PIN_INPUT | MUX_MODE0 ) /* (V2) lcd_data12.lcd_data12 */
		0xd4 ( PIN_INPUT | MUX_MODE0 ) /* (V3) lcd_data13.lcd_data13 */
		0xd8 ( PIN_INPUT | MUX_MODE0 ) /* (V4) lcd_data14.lcd_data14 */
		0xdc ( PIN_INPUT | MUX_MODE0 ) /* (T5) lcd_data15.lcd_data15 */
		0x3c ( PIN_INPUT | MUX_MODE1 ) /* (U13) gpmc_ad15.lcd_data16 */
		0x38 ( PIN_INPUT | MUX_MODE1 ) /* (V13) gpmc_ad14.lcd_data17 */
		0x34 ( PIN_INPUT | MUX_MODE1 ) /* (R12) gpmc_ad13.lcd_data18 */
		0x30 ( PIN_INPUT | MUX_MODE1 ) /* (T12) gpmc_ad12.lcd_data19 */
		0x2c ( PIN_INPUT | MUX_MODE1 ) /* (U12) gpmc_ad11.lcd_data20 */
		0x28 ( PIN_INPUT | MUX_MODE1 ) /* (T11) gpmc_ad10.lcd_data21 */
		0x24 ( PIN_INPUT | MUX_MODE1 ) /* (T10) gpmc_ad9.lcd_data22 */
		0x20 ( PIN_INPUT | MUX_MODE1 ) /* (U10) gpmc_ad8.lcd_data23 */
	>;

};

	spi1_pins_default: spi1_pins_default {
		pinctrl-single,pins = <
			0x190 ( PIN_INPUT | MUX_MODE3 ) /* (A13) mcasp0_aclkx.spi1_sclk */
			0x194 ( PIN_INPUT | MUX_MODE3 ) /* (B13) mcasp0_fsx.spi1_d0 */
			0x198 ( PIN_INPUT | MUX_MODE3 ) /* (D12) mcasp0_axr0.spi1_d1 */
			0x19c ( PIN_OUTPUT | MUX_MODE3 ) /* (C12) mcasp0_ahclkr.spi1_cs0 */
		>;
	};
	
	/* Optional sleep pin settings. Must manually enter values in the below skeleton. */
	spi1_pins_sleep: spi1_pins_sleep {
		pinctrl-single,pins = <
			0x190 ( PIN_INPUT | MUX_MODE3 ) /* (A13) mcasp0_aclkx.spi1_sclk */
			0x194 ( PIN_INPUT | MUX_MODE3 ) /* (B13) mcasp0_fsx.spi1_d0 */
			0x198 ( PIN_INPUT | MUX_MODE3 ) /* (D12) mcasp0_axr0.spi1_d1 */
			0x19c ( PIN_INPUT | MUX_MODE3 ) /* (C12) mcasp0_ahclkr.spi1_cs0 */
		>;
	};

	goodix_pins: pinmux_goodix_pins {
		pinctrl-single,pins = <
			0x74 ( PIN_INPUT | MUX_MODE7 ) /* (U17) gpmc_wpn.gpio0[31] */
			0x88 ( PIN_INPUT | MUX_MODE7 ) /* (T13) gpmc_csn3.gpio2[0] */
		>;
	};

	nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
		pinctrl-single,pins = <
			0x1b0 0x03      /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
		>;
	};

	mcasp0_pins: mcasp0_pins {
		pinctrl-single,pins = <
/*			0x1ac (PIN_INPUT_PULLUP | MUX_MODE0)	/* mcasp0_ahclkx.mcasp0_ahclkx */
/*			0x19c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2 */
/*			0x194 (PIN_OUTPUT_PULLUP | MUX_MODE0)	/* mcasp0_fsx.mcasp0_fsx */
/*			0x190 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mcasp0_aclkx.mcasp0_aclkx */
/*			0x06c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a11.GPIO1_27 */
		>;
	};

	mcasp0_pins_sleep: mcasp0_pins_sleep {
		pinctrl-single,pins = <
/*			0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* mcasp0_ahclkx.mcasp0_ahclkx */
/*			0x19c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkr.mcasp0_axr2 */
/*			0x194 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* mcasp0_fsx.mcasp0_fsx */
/*			0x190 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* mcasp0_aclkx.mcasp0_aclkx */
/*			0x06c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a11.GPIO1_27 */
		>;
	};

	/* WL18xx WiFi */
	wlan_pins_default: pinmux_wlan_pins_default {
		pinctrl-single,pins = <
			0x40 (PIN_INPUT | MUX_MODE7) /* gpmc_a0.gpio1_16 (WL_INT) */
			0x44 (PIN_OUTPUT_PULLDOWN | MUX_MODE7 ) /* gpmc_a1.gpio1[17] (EN_WLAN) */
			/*0x48 (PIN_INPUT | MUX_MODE7 ) /* gpmc_a2.gpio1[18] (DEBUG_EN) in gpio1*/
			0x64 ( PIN_OUTPUT_PULLDOWN | MUX_MODE7 ) /* (U16) gpmc_a9.gpio1[25] Bluetooth EN */
		>;
	};

	wlan_pins_sleep: pinmux_wlan_pins_sleep {
		pinctrl-single,pins = <
			0x40 (PIN_INPUT | MUX_MODE7) /* gpmc_a0.gpio1_16 (WL_INT) */
			0x44 (PIN_OUTPUT_PULLDOWN | MUX_MODE7 ) /* gpmc_a1.gpio1[17] (EN_WLAN) */
			/*0x48 (PIN_INPUT | MUX_MODE7 ) /* gpmc_a2.gpio1[18] (DEBUG_EN) in gpio1*/
			0x64 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (U16) gpmc_a9.gpio1[25] Bluetooth EN */
		>;
	};

	gpio0_pins_default: gpio0_pins_default {
		pinctrl-single,pins = <
			0x1b0 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A15) xdma_event_intr0.gpio0[19] Level Translator*/
			0x124 ( PIN_INPUT | MUX_MODE7 ) /* (K16) gmii1_txd1.gpio0[21] Button*/
			0x128 ( PIN_OUTPUT | MUX_MODE7 ) /* (K17) gmii1_txd0.gpio0[28] Button*/
			0x144 ( PIN_INPUT | MUX_MODE7 ) /* (H18) rmii1_refclk.gpio0[29] Not Connected */
			0x70 ( PIN_INPUT | MUX_MODE7 ) /* (T17) gpmc_wait0.gpio0[30] GPOut*/
		>;
	};
	gpio1_pins_default: gpio1_pins_default {
		pinctrl-single,pins = <
			/*0x40 ( PIN_INPUT | MUX_MODE7 ) /* (R13) gpmc_a0.gpio1[16] Wlan_int*/
			/*0x44 ( PIN_INPUT | MUX_MODE7 ) /* (V14) gpmc_a1.gpio1[17] Wlan_en*/
			0x48 ( PIN_INPUT | MUX_MODE7 ) /* (U14) gpmc_a2.gpio1[18] Wifi debug en*/
			/*0x50 ( PIN_INPUT | MUX_MODE7 ) /* (R14) gpmc_a4.gpio1[20] eMMC reset*/
			/*0x54 ( PIN_INPUT | MUX_MODE7 ) /* (V15) gpmc_a5.gpio1[21] LCD_reset*/
			0x58 ( PIN_INPUT | MUX_MODE7 ) /* (U15) gpmc_a6.gpio1[22] test point T19*/
			0x5c ( PIN_INPUT | MUX_MODE7 ) /* (T15) gpmc_a7.gpio1[23] NC*/
			0x60 ( PIN_INPUT | MUX_MODE7 ) /* (V16) gpmc_a8.gpio1[24] NC*/
			/*0x64 ( PIN_INPUT | MUX_MODE7 ) /* (U16) gpmc_a9.gpio1[25] Bluetooth EN*/
			0x68 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (T16) gpmc_a10.gpio1[26] HW Version - LSB*/
			0x6c ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (V17) gpmc_a11.gpio1[27] HW Version*/
			0x78 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (U18) gpmc_be1n.gpio1[28] HW Version*/
			0x7c ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (V6) gpmc_csn0.gpio1[29] HW Version - MSB*/
		>;
	};
	gpio2_pins_default: gpio2_pins_default {
		pinctrl-single,pins = <
			0x88 ( PIN_INPUT | MUX_MODE7 ) /* (T13) gpmc_csn3.gpio2[0] Touch Reset */
			0x8c ( PIN_INPUT | MUX_MODE7 ) /* (V12) gpmc_clk.gpio2[1] Testpoint T22 */
			0x94 ( PIN_INPUT | MUX_MODE7 ) /* (T7) gpmc_oen_ren.gpio2[3] RFID_EN*/
			0x98 ( PIN_INPUT | MUX_MODE7 ) /* (U6) gpmc_wen.gpio2[4] RFID SS*/
			0x9c ( PIN_INPUT | MUX_MODE7 ) /* (T6) gpmc_be0n_cle.gpio2[5] testpoint T31 */
			0x13c ( PIN_INPUT | MUX_MODE7 ) /* (L15) gmii1_rxd1.gpio2[20] 3V3B Enable*/
			0x140 ( PIN_INPUT | MUX_MODE7 ) /* (M16) gmii1_rxd0.gpio2[21] LED1*/
		>;
	};
	gpio3_pins_default: gpio3_pins_default {
		pinctrl-single,pins = <
			0x108 ( PIN_INPUT | MUX_MODE7 ) /* (H16) gmii1_col.gpio3[0] Testpoint T16 */
			0x10c ( PIN_INPUT | MUX_MODE7 ) /* (H17) gmii1_crs.gpio3[1] Testpoint T15*/
			0x110 ( PIN_INPUT | MUX_MODE7 ) /* (J15) gmii1_rxer.gpio3[2] Testpoint T17*/
			0x114 ( PIN_INPUT | MUX_MODE7 ) /* (J16) gmii1_txen.gpio3[3] Testpoint T13*/
			0x118 ( PIN_OUTPUT | MUX_MODE7 ) /* (J17) gmii1_rxdv.gpio3[4] KV2 Boot0*/
			0x12c ( PIN_INPUT | MUX_MODE7 ) /* (K18) gmii1_txclk.gpio3[9] KV2 Reset*/
			0x130 ( PIN_OUTPUT | MUX_MODE7 ) /* (L18) gmii1_rxclk.gpio3[10] LED2*/
		>;
	};

	uart4_kv2_pins_default: uart4_kv2_pins_default {
		pinctrl-single,pins = <
			0x11c ( PIN_INPUT_PULLDOWN | MUX_MODE3 ) /* (J18) gmii1_txd3.uart4_rxd */
			0x120 ( PIN_OUTPUT | MUX_MODE3 ) /* (K15) gmii1_txd2.uart4_txd */
		>;
	};
	uart3_kv2debug_pins_default: uart3_kv2debug_pins_default {
		pinctrl-single,pins = <
			0x134 ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (L17) gmii1_rxd3.uart3_rxd */
			0x138 ( PIN_OUTPUT | MUX_MODE1 ) /* (L16) gmii1_rxd2.uart3_txd */
		>;
	};
	uart2_wifi_debug_pins_default: uart2_wifi_debug_pins_default {
		pinctrl-single,pins = <
			0x150 ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (A17) spi0_sclk.uart2_rxd */
			0x154 ( PIN_OUTPUT | MUX_MODE1 ) /* (B17) spi0_d0.uart2_txd */
		>;
	};
	uart1_bt_pins_default: uart1_bt_pins_default {
		pinctrl-single,pins = <
			0x180 ( PIN_INPUT | MUX_MODE0 ) /* (D16) uart1_rxd.uart1_rxd */
			0x184 ( PIN_OUTPUT | MUX_MODE0 ) /* (D15) uart1_txd.uart1_txd */
			0x178 ( PIN_INPUT | MUX_MODE0 ) /* (D18) uart1_ctsn.uart1_ctsn */
			0x17c ( PIN_OUTPUT | MUX_MODE0 ) /* (D17) uart1_rtsn.uart1_rtsn */
		>;
	};


};

&lcdc {
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&lcd_pins_default>;
		pinctrl-1 = <&lcd_pins_sleep>;
		status = "okay";
		debug = <3>;
		/* avoid stupid warning */
		#address-cells = <1>;
		#size-cells = <1>;
		panel-info {
			ac-bias           = <255>;
			ac-bias-intrpt    = <0>;
			dma-burst-sz      = <16>;
			bpp               = <16>;
			fdd               = <0x80>;
			tft-alt-mode      = <0>;
			stn-565-mode      = <0>;
			mono-8bit-mode    = <0>;
			sync-edge         = <0>;
			sync-ctrl         = <1>;
			raster-order      = <0>;
			fifo-th           = <0>;
		};
		display-timings { /* Cordial CT040BLP32 */
			480x800 {
			hactive         = <480>;
			vactive         = <800>;
			hback-porch     = <5>;
			hfront-porch    = <5>;
			hsync-len       = <5>;
			vback-porch     = <5>;
			vfront-porch    = <5>;
			vsync-len       = <5>;
			clock-frequency = <16600000>;
			hsync-active    = <0>;
			vsync-active    = <0>;
			};
		};
	};

&spi1 {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&spi1_pins_default &spi1_pins_sleep>;
		debug = <3>;
	spi-display {
		compatible = "omapdss,kuvee,cordial-spi";
		spi-max-frequency = <500000>;
		reg = <0>; /* Chip select 0 */
	        reset-gpios = <&gpio1 21 0>; /*  lcd reset */
		debug = <3>;
	};
};



&mcasp0	{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mcasp0_pins>;
	pinctrl-1 = <&mcasp0_pins_sleep>;
	status = "disabled";
	op-mode = <0>;	/* MCASP_IIS_MODE */
	tdm-slots = <2>;
	serial-dir = <	/* 0: INACTIVE, 1: TX, 2: RX */
			0 0 1 0
		>;
	tx-num-evt = <1>;
	rx-num-evt = <1>;
};

&tps {
	 /delete-property/ ti,pmic-shutdown-controller; 

	backlight {
	isel = <1>;  /* 1 - ISET1, 2 ISET2 */
		fdim = <100>; /* TPS65217_BL_FDIM_100HZ */
		default-brightness = <50>;
	};
};

&rtc {
	ext-clk-src;
};


/ {

	clk_mcasp0_fixed: clk_mcasp0_fixed {
	      #clock-cells = <0>;
	      compatible = "fixed-clock";
	      clock-frequency = <24576000>;
	};

	clk_mcasp0: clk_mcasp0 {
	      #clock-cells = <0>;
	      compatible = "gpio-gate-clock";
	      clocks = <&clk_mcasp0_fixed>;
	      enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
	};

	hdmi_audio: hdmi_audio@0 {
	       compatible = "linux,hdmi-audio";
	       status = "disabled";
	};

	sound {
		status = "disabled";
		compatible = "ti,beaglebone-black-audio";
		ti,model = "TI BeagleBone Black";
		ti,audio-codec = <&hdmi_audio>;
		ti,mcasp-controller = <&mcasp0>;
		ti,audio-routing =
			"HDMI Out",	"TX";
		clocks = <&clk_mcasp0>;
		clock-names = "mclk";
	};
};

  • Hi,

    I will ask the software team to look at this.
  • Hi,

    Could you try the following:

    &spi1 {

       status = "okay";

       pinctrl-names = "default", "sleep";

       pinctrl-0 = <&spi1_pins_default &spi1_pins_sleep>;

           debug = <3>;

       spi-display@0 {                                          /*this should bind spi-display to cs0 & help in resolving " probe of spi1.0 failed with error -22"*/

           compatible = "omapdss,kuvee,cordial-spi";

           spi-max-frequency = <500000>;

           reg = <0>; /* Chip select 0 */

               reset-gpios = <&gpio1 21 0>; /*  lcd reset */

           debug = <3>;

       };

    };

    Best Regards, 
    Yordan

  • Thanks Yordon - unfortunately, the @0 didn't help.  I still get the same error.

    [    1.261148] panel-cordial-ct040blp32 spi1.0: failed to find video source                                                                     
    [    1.267915] panel-cordial-ct040blp32: probe of spi1.0 failed with error -22   
    Thinking about it, the existence of a video source or not would not depend on whether the display had been initialized or not over spi.  In the code it appears to be looking for something called source for first ep - I've got no idea what that is...
    static int cordial_probe_of(struct spi_device *spi)
    {
    struct device_node *node = spi->dev.of_node;
    struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
    struct omap_dss_device *in;
    int gpio;
    gpio = of_get_named_gpio(node, "reset-gpios", 0);
    if (!gpio_is_valid(gpio)) {
    dev_err(&spi->dev, "failed to parse enable gpio\n");
    return gpio;
    }
    ddata->res_gpio = gpio;
    /* XXX the panel spec doesn't mention any QVGA pin?? */
    ddata->qvga_gpio = -ENOENT;
    in = omapdss_of_find_source_for_first_ep(node);
    if (IS_ERR(in)) {
    dev_err(&spi->dev, "failed to find video source\n");
    return PTR_ERR(in);
    }
    ddata->in = in;
    return 0;
    }
    II did check and verify that the spi communications is happening properly, and that the reset is inactive.
    Still no display output; no pixelclock.
    I did notice something interesting - I found that the driver compatible line is  tilcdc_drv.c, which lives under drm;  do I need to have drm turned on in the kernel config for lcdc to work?
  • Just adding to the potential debug information here:

    I found a posting where you commented to a user that they should remove the CONFIG_FB_DA8XX=y & CONFIG_FB_DA8XX_TDA998X=y options, so I did that. I also added back the top level DRM settings, but there are several more drm settings that I imagine might be necessary. Can you provide a list of the required kernel configs?

    Where it stands right now is that when I boot, I get tilcdc errors like so:

    [ 0.886797] tilcdc 4830e000.fb: no encoders/connectors found
    [ 0.892524] tilcdc 4830e000.fb: failed to initialize mode setting

    are there additional dtb settings required?
  • Hi,

    Geoffrey Lansberry said:
    Can you provide a list of the required kernel configs?

     

    Available information about LCDC linux driver (using FB or DRM) is a located here: 

    http://processors.wiki.ti.com/index.php/Processor_SDK_Linux_LCDC

    http://processors.wiki.ti.com/index.php/Linux_Core_LCD_Controller_User_Guide 

    About dts file, you could try two things:
    1. Add a panel node, s

  • Thank you Yordan, I have seen the second link, but the first one is new to me. I've been searching for weeks but never found that.

    I has already really helped. We are using the sgx; and according to the introduction, this is only supported via fbdev; so this focuses my attention on fbdev only.

    It looks like you started a list of things for me to try, but didn't finish it. Is the panel node relevant to fbdev? What is the second item?

    Geoff
  • Hi,

    Sorry for the delayed response. I was OoO last week.

    Geoffrey Lansberry said:
    We are using the sgx; and according to the introduction, this is only supported via fbdev

     

    Even when working with drm (which is the case in kernel 4.1), you still have /dev/fb, so sgx should work with drm as well.  

    Geoffrey Lansberry said:
    It looks like you started a list of things for me to try, but didn't finish it. Is the panel node relevant to fbdev?

     

    Correct. Something messed up, when I was posting from the use rich formatting button on the forum, and I've missed the fact that my answer was incomplete. 
    What I wanted to suggest was: 
    1.Try adding a panel node (refer to am335x-evmsk.dts and am335x-evm.dts), which binds the display with TI LCDC:
      compatible = "ti,tilcdc,panel"; 

    2. Note that AM335x devices do not have dss subsystem, like AM57xx devices. They use lcdc instead, so you should bind your display with LCDC, not OMAP DSS.  Maybe you need to modify the  static struct of_device_id <kuvee_display_driver>_of_match[] part in your customized lcd driver. 

    I suspect that, because you do not bind your kuvee display with the am335x lcd controller (lcdc), you get the fb errors in your bootlog. 

    Best Regards, 
    Yordan