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Keystone DSP 6654 and 6657

giorgos tsoumplekas
Expert 1840 points

Dear all, 

I have a question about keystone architecture based DSp 6654 and 6657 regarding the connection between the temperature and clock frequency of DDR3 or/and CPU.

 If we downgrade the clock frequency of CPU clock or /and DDR3 clock, the temperature will accordingly reduce?

 We have gone through   the sprabi5a.pdf document but this is not clear.

What are the factors that affect the temperature. How we can reduce the temperature without use a heatsink?

 

  • 0
    TI__Mastermind 43660 points
    Giorgos,

    The temperature of the device depends mainly on the power consumption of the device. The power consumption in turn depends on the core voltage, operating frequency and peripherals usage.

    What is the your requirement on the device operating frequency ?

    For C6657, Full operation of all interfaces requires a minimum core clock frequency of 850MHz. The device is only tested down to that frequency and there are a number of internal clock domain transitions that may not operated at core clock speeds that are lower. We cannot support core clock speeds slower than 850MHz.

    Regards,
    Senthil
  • 0 in reply to Senthilkumar Srinivasan
    TI__Mastermind 43660 points
    Giorgos,

    In order to decide on the heat sink requirement, you may need to do perform thermal analysis on your board and see if your board is capable enough to dissipate the device heat.

    Regards,
    Senthil