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AM437X Starter Kit TMDXSK437X DDR3 Data Pins

Mark Doyle
Intellectual 295 points
Other Parts Discussed in Thread: AM4376

I'm looking over the AM43X Starter Kit EVM Schematic am437x_starterkit_evm_3k0009.dsn Rev 1.2A dated July 9,2015 sheet 6 DDR3 DDRAM Memory, and see that the DDR data pins coming from the AM437X are shuffled relative to the DDR chips (e.g., AM437X DDR_D1 is connected to MT41K DQ7) in no obvious pattern. Is the schematic correct and if so, why are the data lines shuffled?

  • 0
    TI__Guru**** 393215 points
    This is done to facilitate routing of the PCB. You can swap DDR3 signals on the memory side according to the following rules:
    1. Address/Control/Clock signals cannot be swapped.
    2. Data bits can be swapped within the byte lane they belong to, with the exception of the LSB (e.g. D0, D8, D16, D24) which must be routed 1:1.
    3. Complete byte lanes can be swapped, but only together with their corresponding DM and DQS/DQSn signals.

    The AM437X Starter Kit schematic is correct and this is a fully functional board.
  • 0 in reply to Biser Gatchev-XID
    Intellectual 295 points
    Thanks for the quick and complete reply. We're having some problems getting the same memory chips to work with an AM4376 on our custom board so are looking to the starter kit as a working example. Regards.