66AK2H14/12 timer reset issue

Hi,

I am using 66AK2H14/12 and have been trying to reset the timer but it didn't work. Here is the timer configuration on my DSP. I enable one global timer (TIMER_8) to generate interrupt on DSP continuously once it is enabled. I configure the timer using dual 32-bit timers unchained mode and use lower 32-bit timer. The period of this timer is set to 1.666 ms. I can see the DSP is getting interrupt every 1.666 ms continuously after the timer is enabled and running.

Here is the code I use to enable the timer on DSP:

    CSL_tmrInit(NULL);
    memset(&TmrObj[0], 0, sizeof(CSL_TmrObj));

   // get handle to instance of Timer 0
    hTmr[0] =CSL_tmrOpen(&TmrObj[0], CSL_TIMER_8 , NULL, &StatusTmr[0]);
    if (hTmr[0] == NULL)
    {
        printf("Error: Initialization of Timer 0 failed. \n");
        return;
    }
    //setup Hardware Defaults
    CSL_tmrHwSetup(hTmr[0], &hwSetup);

    //Set up the timer as dual 32-bit timers unchained mode
    hTmr[0]->regs->TGCR =0x4;

   //The timer is enabled continuously
    hTmr[0]->regs->TCR = 0x80;

   //Set up the timer period to 1.666ms
    hTmr[0]->regs->PRDLO = SLOT_DURATION_IN_UNITSOF_5NS;

   //reset the timer counter to 0
    hTmr[0]->regs->CNTLO =0x0;

   //Enable the timer
    hTmr[0]->regs->TGCR |=0x1;

The DSP is also receiving an external hardware interrupt with very accurate clock every 40ms. Since the DSP internal clock is not accurate comparing to the external clock source, I will need to reset the DSP timer when it receives the hardware interrupt every 40ms to synchronize the DSP timer interrupt to the external hardware interrupt. I follow the instructions of how to reset the timer in "KeyStone Architecture TIMER64P" user guide (SPRUGV5A) by resetting the TIMLORS bit in TGCR register.  However, the DSP timer is not reset at all and thus not synchronizing to the external interrupt. Here is the code I use to reset the DSP timer in the external hardware interrupt service routine function:

    //Clear the TIMLORS bit
     hTmr[0]->regs->TGCR &= 0xFFFE;

   //Clear the timer counter
     hTmr[0]->regs->CNTLO = 0x0;

   //Set the TIMLORS bit to 1
     hTmr[0]->regs->TGCR |= 0x1;        // Enable High Timer0

Thanks,

Bin