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C6678 PCI endpoint, bus master transaction problem

Other Parts Discussed in Thread: CODECOMPOSER

Hello, I'm working with a c6678 acting as pci endpoint , CodeComposer 5.5, mcsdk_2_01_02_06

This is my PCI chain:

Root complex --> PLX PCI to PCI express bridge (PEX8112) --> PLX PCI express switch (PEX8603) --> DSP6678

At startup RC enumerates devices as follow
- pci address 0x00000000 --> BAR0 of PEX8603
- pci address 0x00100000 --> BAR0 of C6678
- pci address 0x00104000 --> BAR1 of C6678
- pci address 0x00108000 --> BAR2 of C6678

And this is ok for me

From RC I can succesfully read BAR0 of PEX8603
From RC I can succesfully read BAR0,1,2 of C6678

Now I would like to access BAR0 of PEX8603 from C6678

I do the following:
- I set STATUS_COMMAND[BUS_MASTER] to 1 (Enables mastership of the bus)
- I configure an OUTBOUND region (region 0) by writing
@0x21800200 (OB_OFFSET_INDEX0) --> 0x00000001
@0x21800204 (OB_OFFSET0_HI) --> 0x00000000
@0x21800030 (OB_SIZE) --> 0x00000000 (size = 1M)

After that  I read at internal address 0x60000000 (I expect to read BAR0 of PEX8603) but I cant read right values (PEX8603 vendorid and deviceid, I read these values from RC)

what's wrong with my procedure?

Thanks in adance for your help

Fabio