• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 99 subscribers
  • Views 1103 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

C6657 SPI Implementation

Toby Jacob
Prodigy 125 points
Other Parts Discussed in Thread: TMS320C6657

Hello,

I have a few questions regarding on how to implement SPI into TMS320C6657. I plan on using SPI to communicate to an external device (ADC) and I am new to the C6000.

I have tried to run few SPI examples but I don’t know what to do with them after I build it on CCS. Do I flash it to the DSP? What is the proper way of flashing? Is there another way besides using boot? How can I test the SPI?

I am currently using the Processor SDK SPI example.

I hope you can help me understand how to do this.

I currently have the latest MCSDK 2.1.2.6, Processor SDK 2.0.1.7, and CCS v6.1.2

Thanks

  • 0
    TI__Guru* 81335 points

    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com). Please read all the links below my signature.

    We will get back to you on the above query shortly. Thank you for your patience.

  • 0
    TI__Guru* 81335 points
    Hi Toby,

    You can run those examples by loading through CCS.

    Please refer Chapter 2 of Keystone Lab manual for the detailed procedure.
    www.ti.com/.../sprp820.pdf

    I hope you are using C6657 EVM, you may need to select appropriate gel and target configuration file for running example on C6657.

    Thank you.
  • 0 in reply to Raja
    Prodigy 125 points

    Hello,

    I am using C6657 EVM and have selected evmc6657l.gel. I have also ran examples in the lab manual you linked me but that has not help me understand how to use the SPI example.

    I have build the latest Processor SDK SPI example but I do not know what to do after that. Do I flash the .out file to NOR boot and then SPI boot? What is the proper steps on doing this?
    I am still confused on this process and hope to receive some help.

    Here is the console output of the SPI_BasicExample_C6657_c66xExampleProject/main_spi_flash_read_example.c

    C66xx_0: GEL Output: Setup_Memory_Map...
    C66xx_0: GEL Output: Setup_Memory_Map... Done.
    C66xx_0: GEL Output:
    Connecting Target...
    C66xx_0: GEL Output: DSP core #0
    C66xx_0: GEL Output: C6657L GEL file Ver is 1.006
    C66xx_0: GEL Output: Global Default Setup...
    C66xx_0: GEL Output: Setup Cache...
    C66xx_0: GEL Output: L1P = 32K
    C66xx_0: GEL Output: L1D = 32K
    C66xx_0: GEL Output: L2 = ALL SRAM
    C66xx_0: GEL Output: Setup Cache... Done.
    C66xx_0: GEL Output: Main PLL (PLL1) Setup ...
    C66xx_0: GEL Output: PLL in Bypass ...
    C66xx_0: GEL Output: PLL1 Setup for DSP @ 1000.0 MHz.
    C66xx_0: GEL Output: SYSCLK2 = 333.3333 MHz, SYSCLK5 = 200.0 MHz.
    C66xx_0: GEL Output: SYSCLK8 = 15.625 MHz.
    C66xx_0: GEL Output: PLL1 Setup... Done.
    C66xx_0: GEL Output: Power on all PSC modules and DSP domains...
    C66xx_0: GEL Output: Set_PSC_State... Timeout Error #03 pd=12, md=4!
    C66xx_0: GEL Output: Power on all PSC modules and DSP domains... Done.
    C66xx_0: GEL Output: DDR3 PLL (PLL2) Setup ...
    C66xx_0: GEL Output: DDR3 PLL Setup... Done.
    C66xx_0: GEL Output: DDR3 Init begin (1333 auto)
    C66xx_0: GEL Output: XMC Setup ... Done
    C66xx_0: GEL Output: IFRDY bit is SET: DDR3 Interface Ready
    C66xx_0: GEL Output:
    DDR3 initialization is complete.
    C66xx_0: GEL Output: DDR3 Init done
    C66xx_0: GEL Output: DDR3 memory test... Started
    C66xx_0: GEL Output: DDR3 memory test... Passed
    C66xx_0: GEL Output: PLL and DDR3 Initialization completed(0) ...
    C66xx_0: GEL Output: configSGMIISerdes Setup... Begin
    C66xx_0: GEL Output: SGMII SERDES has been configured.
    C66xx_0: GEL Output: Enabling EDC ...
    C66xx_0: GEL Output: L1P error detection logic is enabled.
    C66xx_0: GEL Output: L2 error detection/correction logic is enabled.
    C66xx_0: GEL Output: MSMC error detection/correction logic is enabled.
    C66xx_0: GEL Output: Enabling EDC ...Done
    C66xx_0: GEL Output: Global Default Setup... Done.
    C66xx_0: GEL Output: Invalidate All Cache...
    C66xx_0: GEL Output: Invalidate All Cache... Done.
    C66xx_0: GEL Output: GEL Reset...
    C66xx_0: GEL Output: GEL Reset... Done.
    C66xx_0: GEL Output: Disable all EDMA3 interrupts and events.


    Thanks

  • 0 in reply to Toby Jacob
    TI__Guru* 81335 points

    Hi Toby,

    Please ensure to load and  run the .out file on DPS cores and connect the DSP serial cable with Host serial port. Open the serial port with baudrate 115200. Please find the output screenshot of "SPI_BasicExample_C6657_c66xExampleProject"

     Do I flash the .out file to NOR boot and then SPI boot? What is the proper steps on doing this?

    Please refer below section in wiki for booting DSP using NOR/NAND etc

    http://processors.wiki.ti.com/index.php/BIOS_MCSDK_2.0_User_Guide#Booting_and_Flash

    The boot examples can be found in below path.

    PATH:  ~\ti\pdk_c665x_2_0_0\packages\ti\boot\examples

    Thank you.

  • 0
    Intellectual 615 points
    Toby,

    e2e.ti.com/.../1480233

    This answerd thread did great help to me.
    See the "Answered" relpy, there is an example. Which will do the most help to you!

    Regards,
    Frank