Howdy,
I am currently working with a Sitara AM572x series processor, and am having some confusion regarding the operating clock frequencies of the A15_0, A15_1, DSP1, and DSP2 cores. This leads me to a series of questions:
My system is using an input clock frequency of 20MHz, and I am building/configuring XDC sysbios onto this system. In the Platform.xdc file, I have the following (among other things) defined:
/* ARM */ readonly config xdc.platform.IExeContext.Cpu ARM = { id: "3", clockRate: 650.0, /* Typically set by the HLOS */ catalogName: "ti.catalog.arm.cortexa15", deviceName: "Vayu", revision: "1.0" };
readonly config xdc.platform.IExeContext.Cpu DSP = { id: "0", clockRate: 600, catalogName: "ti.catalog.c6000", deviceName: "DRA7XX", revision: "1.0", };
When executing my program, calling BIOS_getCpuFreq() on ARM0 yields the correct value of 650MHz. However, when looking at the DPLL registers for DPLL_MPU (which sources the clock frequencies for both of the ARM cores) the multiply value is 150 and the divide value is 4. This would result in a DPLL output of 750 MHz. Which value is correct? How can I verify the operating frequency of the ARM cores?
My question is repeated for the DSP cores, as well. I was able to test the operating frequency of the DSP cores, and it appeared that the operating frequency of those cores would NOT change when the platform.xdc definitions changed. Manually changing the multiply and divide values, however, allowed me to change the DSP operating frequency. Why did the platform.xdc file not correctly change the clock frequency?
Thank you, in advance, for your assistance.