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C6486 POR and RESET

Other Parts Discussed in Thread: TMS320C6472

Hi,

Our customer use the C6486 with direct MAC-to-MAC GMII mode.

The BOOTMODE[3:0] is 1001, which is the EMAC Boot, so we expect to see BOOTP packet from the C6486 after reset, however all we see is the GMTCLK outputs 125MHz (which is OK), but no BOOTP packet.

That design use only the POR (the RESET is held at 3.3v), so my question is: if the POR can be the ONLY signal sampling the configuration pins, and that the BOOTP packet should follow this process?

Thanks,

Eliezer 

  • Eliezer,

    Please review documentation such as the TMS320C6472/TMS320TCI6486 Hardware Design Guide Application Report (SPRAAQ4). In addition to the TMS320TCI6486 Communications Infrastructure Data Manual, it clearly reinforces the operation of RESETz and PORz and states that RESETz can be tied high if not needed.

    DM: www.ti.com/.../sprs300n.pdf or www.ti.com/.../sprs612g.pdf
    HDG: www.ti.com/.../spraaq4b.pdf

    There are many potential reasons preventing the BOOTP packet transmission. Are you certain that the DSP is executing? Have you verified that the system PLL is running at the correct rate by checking the SYSCLKOUT pin? Have you connected with CCS and validated that the DSP is executing the EMAC boot mode?

    Tom
  • Tom,

    The SYSCLKOUT is verified at 83MHz, which matches to the CLKIN1=25MHz and default PLLM=19 of PLL1, so it's a positive indication.

    CCS is not an option at this moment.

    Do you have any other suggestions for troubleshooting why the BOOTP are missing?

    Thanks,

    Eliezer 

     

  • Eliezer,

    JTAG emulation is a must for board bring-up.  You are blind without it.  Do you have an external boot memory attached like an SEEPROM on the I2C interface?  You could write test programs that validate incremental levels of boot configuration and success where a GPIO toggles to indicate progress.  Otherwise, I recommend that you instrument a method to get JTAG functional.

    Tom