C6727 dMAX events interrupt

Gilberto Sada80

Prodigy 60 points

We trying to configure the C6727 to trigger INT13 on an event from port SPI0_SCS/I2C1_SCL.

This is what we are doing:

#define CFGMCASP0_REG (*(UINT32 *) 0x40000018)

#define DMAX_MCASP0ERR (*(UINT32 *) 0x61008068)

#define DMAX_DEPR_REG (*(UINT32 *) 0x60000008)

#define DMAX_DEER_REG (*(UINT32 *) 0x6000000C)

#define DMAX_DEDR_REG (*(UINT32 *) 0x60000010)

#define DMAX_DEHPR_REG (*(UINT32 *) 0x60000014)

#define DMAX_DELPR_REG (*(UINT32 *) 0x60000018)

#define DMAX_DEFR_REG (*(UINT32 *) 0x6000001C)

#define DMAX_DER0_REG (*(UINT32 *) 0x60000034)

#define DMAX_DER1_REG (*(UINT32 *) 0x60000054)

#define DMAX_DER2_REG (*(UINT32 *) 0x60000074)

#define DMAX_DER3_REG (*(UINT32 *) 0x60000094)

CFGMCASP0_REG = 4;

DMAX_MCASP0ERR = 0x00060007;

DMAX_DEPR_REG = 0x04000000;

DMAX_DEHPR_REG = 0x04000000;

DMAX_DEER_REG = 0x04000000;

We see event flag register go high before we enable the event register as expected.

When the event register is set, we do not reliable see the appropriate event (26) register go high.

No interrupts are generated.

We can force interrupts through the IFR register, but not through the external SPI0_SCS/I2C1_SCL port using the approach outlined above.

Any ideas as to what we are missing?

over 9 years ago

0 Gilberto Sada80 over 9 years ago

Prodigy 60 points

Actually CFGMCASP0_REG = 6; (instead of 4 as mentioned in my previous post)

We are following the example in 3.7 of:
www.ti.com/.../spru795d.pdf

I found this post that seems to be in agreement with what we are seeing (they are looking at ARX9 instead of SPI0_SCS/I2C1_SCL like we do):

e2e.ti.com/.../1584959

The response seems to refer to

www.ti.com/.../spru878b.pdf

and makes some suggestions about initializing the McASP. Do all of these suggestions apply? There is no mention of it on SPRU795D section 3.7 and this seems to be configured as AMUTEIN. Note, we see the DMAX_DEFR with the correct value all all the time while DMAX_DEER is low. As soon as we enable DMAX_DEER, DMAX_DEFR goes low as expected. But DMAX_DER3 does not always show 0x00000004, and like in the post above, we do not get INT13.

Thanks in advance for any help in figuring out this issue.

0 Sivaraj Kuppuraj over 9 years ago in reply to Gilberto Sada80

TI__Mastermind 35645 points

Hi,

Thanks for additional information.

As you asked regarding McASP, all of the suggestion are applicable with reference to spru878b.pdf pointed in the above thread:

https://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/115/p/441866/1584959

I think, you can check the below E2E thread with dMAX servicing the SPI data transfer requests to trigger CPU and to synchronize dMAX with SPI events:

https://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/115/t/12203#pi317286=1

As well you could refer Appendix B for programming SPI and example codes for dMAX servicing the SPI data request, kindly refer B.1.1 & B.1.2 from SPI reference guide as below:

http://www.ti.com.cn/cn/lit/ug/spru718b/spru718b.pdf

Thanks & regards,

Sivaraj K

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C6727 dMAX events interrupt