Hello,
I would like to know if there is any easy way to shorten the IRQ latency or at least narrow the jitter in it in the Keystone II K2H running Arago ARM Linux.
I am currently testing it by giving pulses at 100kHz into the GPIO 0 pin. Then I have written my interrupt handler as a kernel module where I catch that interrupt and give a short pulse into the GPIO pin 15. I measure these 2 pins with an oscilloscope and see that there is a time gap between these pulses of 2 us to 7 us.
Because of this jitter I think there is some another interrupt with the same or even highr priority than my GPIO IRQ causing these delays.
In order to make this better I have studied and modified the GIC registers to have the highest priority for my GPIO IRQ, but it does not help. The GIC registers change alright, but the priority setting has no effect on the oscilloscope curves. Only disabling/enabling the IRQ through the GIC succeeds.
I read from some TI forum that the priorities do not have any effect in Linux because its scheduling mechanism. Is this true?
There are kernels like non preemptive, preemptive and RT. I am not 100% sure, but I suppose I have a preemptive kernel running in my board because from oscilloscope I can see that another interrupt sometimes interrupts my GPIO handler (= preempts it). This can be seen so that the output pulse given into the pin 15 is sometimes much longer than normally.
Now I would like to know if an RT kernel can bring any significant improvement. I have compiled source codes for it already but not yet updated it into the board. Before doing so I want to know if it is worth trying.
I have also heard of fast interrupts (FIQ). I haven't used them before, but I read from some forum that using them in Linux is, if not impossible, then at least next to it.
I think I can live with that 2us latency but the additional 5us jitter is not tolerable for my case.
Are there any means to have a narrower latency or are all the alternatives too hard or impossible to do?
Best regards,
Ari
