I'm using two-DDR3 Memory - MT41K256M16HA which are used to AM437x IDK.
My connect target message is below :
CortexA9: Output: **** AM437x IDK EVM Initialization is in progress ..........
CortexA9: Output: **** Device Type: GP
CortexA9: GEL Output: System input clock is 24MHz
CortexA9: GEL Output: **** AM43xx OPP100 with CLKIN=24MHz is in progress .........
CortexA9: GEL Output: **** Going to Bypass...
CortexA9: GEL Output: **** Bypassed, changing values...
CortexA9: Output: **** Locking PLL
CortexA9: GEL Output: **** MPU PLL locked
CortexA9: GEL Output: **** Core Bypassed
CortexA9: GEL Output: **** Now locking Core...
CortexA9: GEL Output: **** Core locked
CortexA9: GEL Output: **** Calculated PER SD Divisor=4
CortexA9: GEL Output: **** PER DPLL Bypassed
CortexA9: GEL Output: **** PER DPLL Locked
CortexA9: GEL Output: **** Calculated EXTDEV SD Divisor=4
CortexA9: GEL Output: **** EXTDEV DPLL Bypassed
CortexA9: GEL Output: **** EXTDEV DPLL Locked
CortexA9: GEL Output: **** DISP PLL Config is in progress ..........
CortexA9: GEL Output: **** DISP PLL Locked
CortexA9: GEL Output: **** DDR DPLL Bypassed
CortexA9: GEL Output: **** DDR DPLL Locked
CortexA9: GEL Output: **** Setting DDR3 = 400MHz
CortexA9: GEL Output: **** AM43xx OPP100 configuration is done .........
CortexA9: GEL Output: Starting DDR3 configuration...
CortexA9: Output: EMIF PRCM is in progress .......
CortexA9: Output: EMIF PRCM Done
CortexA9: GEL Output: EMIF CLK enabled...
CortexA9: GEL Output: Waiting for VTP Ready .......
CortexA9: GEL Output: VTP is Ready!
CortexA9: GEL Output: VTP controller enabled
CortexA9: GEL Output: Checking if DLL is ready...
CortexA9: GEL Output: DLL is ready
CortexA9: GEL Output: Configuring DDR IOs and Control Module registers...
CortexA9: GEL Output: Configuration of Control Module registers complete
CortexA9: GEL Output: Setting up DDR3 H/W leveling configuration...
CortexA9: GEL Output: Starting EMIF controller configuration...
CortexA9: GEL Output:
DDR3 Hardware leveling complete... Outputing all the leveling results !!!
CortexA9: GEL Output: PHY_STATUS_12=0x07000032
CortexA9: GEL Output: PHY_STATUS_13=0x07000032
CortexA9: GEL Output: PHY_STATUS_14=0x0700003A
CortexA9: GEL Output: PHY_STATUS_15=0x07000036
CortexA9: GEL Output: PHY_STATUS_16=0x00000000
CortexA9: GEL Output: PHY_STATUS_7 =0x00000049
CortexA9: GEL Output: PHY_STATUS_8 =0x00000049
CortexA9: GEL Output: PHY_STATUS_9 =0x0000004A
CortexA9: GEL Output: PHY_STATUS_10=0x0000004D
CortexA9: GEL Output: PHY_STATUS_11=0x00000000
CortexA9: GEL Output: PHY_STATUS_17=0x000F0142
CortexA9: GEL Output: PHY_STATUS_18=0x01610142
CortexA9: GEL Output: PHY_STATUS_19=0x000F0142
CortexA9: GEL Output: PHY_STATUS_20=0x021F0043
CortexA9: GEL Output: PHY_STATUS_21=0x00000000
CortexA9: GEL Output: PHY_STATUS_22=0x03CF0102
CortexA9: GEL Output: PHY_STATUS_23=0x01210102
CortexA9: GEL Output: PHY_STATUS_24=0x03CF0102
CortexA9: GEL Output: PHY_STATUS_25=0x01DF0003
CortexA9: GEL Output: PHY_STATUS_26=0x00000000
CortexA9: GEL Output:
DDR3 CONFIGURATION FAILED!!! Could not read/write first DDR location.
CortexA9: GEL Output: Expected 0xA5A5A5A5, Read: 0xA5F9BF23
CortexA9: Output: **** AM437x IDK EVM Initialization is Done ******************
JTAG is XDS100v2, CCS version is 6.1.1.
Please give me any tips to solve the error. Thanks.