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Using UART in DMA FIFO mode

Anton Evstafiev
Prodigy 160 points

Hi,

The project I'm working with is based on C6743 and it's required to use UART with high baudrates about 1Mbps. I have ported pspiom drivers (biospsp_03_00_01_00 package) from C6748 to C6743 with SYS/BIOS 6.35.04.50. I nave tried to use UART driver in interrupt and DMA FIFO mode. Due to high baudrate and in order to significantly decrease CPU overhead I have solved to use DMA FIFO mode. Transmitter part is OK, but receiver is not OK. When interrupt mode is used than the driver is capable to reflect on receive timeout interrupt when amount of received data is less then selected.

Question 1. Is it possible to implement receive timeout in DMA FIFO mode?

Question 2. What is the purpose using dummy edma channel linked to first edma channel in transmitter section of the uart driver?

  • 0
    TI__Mastermind 35645 points

    Hi,

    Thanks for your post.

    You could use LSR in which if the DR bit is set and the corresponding interrupt enable bit is set (ERBI = 1 in IER), an interrupt request would be generated which indicates the data ready for the receiver. Refer Table 30-17 from the TRM below:

    I think, there is a ERBI field in IER which can be enabled so that it gives the provision to enable receiver data available interrupt and character timeout indication interrupt. Kindly refer Table 30-9 from the TRM below:

    http://www.ti.com/lit/ug/spruh79a/spruh79a.pdf

    As well, in the non-FIFO mode, when a character is placed in RBR and if the receiver data-ready interrupt is enabled in IER, an interrupt would be generated. This interrupt would be cleared when the character is read from RBR.

    In the FIFO mode, the same interrupt would be generated when the FIFO is filled to the trigger level selected in the FIFO control register, and it would be cleared when the FIFO contents drops below the trigger level. For more info. kindly refer section 30.3.1 from the above doc.

    The above would the feasibility check flag fields which would tell if RBR is receiving a new byte or not.

    Also, there are starterware example projects for the UART module to experiment and to debug the UART Tx. and Rx. packets in the below path:

    ~\pdk_C6748_2_0_0_0\C6748_StarterWare_1_20_03_03\build\c674x\cgt_ccs\c6748\lcdkC6748\uart_edma

    Thanks & regards,

    Sivaraj K

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