omapl138 how arm and dsp communicate

Hi user4529167,

I would like to refer to the following links to understand the ipc between ARM and DSP cores.
processors.wiki.ti.com/.../StarterWare_01.10.01.01_User_Guide

Extract from that link is given below:-

Inter-Processor Communication (IPC) and IPClite
Hardware Overview

The inter-processor communication (IPC) hardware mechanism for the OMAP-L138 DSP + ARM processor is very straight forward as shown in the following illustration. At the SoC level, five CHIPINT bits are allocated in the CHIPSIG memory-mapped register (MMR) located in the SYSCFG system configuration module for the signaling between the DSP and ARM. Up to four signals can be mapped for the DSP to notify the ARM and two for the ARM to notify the DSP with an additional signal just for the DSP non-maskable interrupt (NMI) event. Note that two bits are common to both the DSP and ARM CPUs so that they can be both interrupted at the same time. This is a useful feature for debugging purposes. Writing one to the bit will generate the signal or event. These events are fed to the respective interrupt controller (INTC) to get mapped to the core interrupt inputs.
To pass data, any of the 128KB internal or 512MB external memory areas can be used as shared memory. Mutually exclusivity can be controlled using the mutex or semaphore mechanisms provided with the operating system.


IPClite

Inter-Processor Communication on OMAP-L138 can be facilitated using IPClite, a software package included with StarterWare. It is a thin level of abstraction with a simple to use IPC initialization and Notify API. IPClite internal structure only uses 2 CHIPINT signals and 32 bytes (relocatable) of the 128KB internal shared memory. The IPC module performs the data structure initialization and initial synchronization between the 2 CPUs. The Notify module contains APIs to set up events, send notification to the other CPU as well as wait for an event in case polling method is desirable over interrupt method.

The most often-used API perhaps will be Notify_sendEvent which allows the application on one CPU to pass a 32-bit value to the other CPU's application via an event handler. The number of events, as well as its associated handler is programmable for each CPU. By not tying any meaning to the 32-bit value nor the event, your application can use the same call to pass a simple 32-bit value for one event, or a 32-bit pointer to a shared buffer of a complex data structure containing commands and data for another event, with no buffer copying needed between the 2 CPUs.

The IPClite API calls are the same for applications running on ARM or DSP, allowing easy portable and flexible application development involving multicore communication. To view the API for IPClite, first open the "OMAPL138_StartWare_1_10_xx_xx.chm" file (xx_xx is the subversion numbers) in the "docs" folder. Under "File List", click on "ipc.c" to view the IPC initialization API and "notify.c" for the Notify related API.