Hello.
I try to use mcAsp as slave with dsp as master using ACLKX AFSX AXR0 AXR1. The dsp operates the clock (1MHz for test) and sync (every 32 bits) lines.
I work with vxworks 6.9 which has no driver to mcAsp. So I try to set my own driver.
I run on am3356 cpu, and I use mcAsp1.
I run code for init , and I fail in Release receive serializers from reset.
This is the code :
McASPReset(mcAspAddr);
McASPRxReset(mcAspAddr);
McASPTxReset(mcAspAddr);
/*If DMA mode of operation is intended : */
McASPWriteFifoEnable(mcAspAddr, 2, 64); /* 2 serializers, 64 words */
McASPReadFifoEnable(mcAspAddr, 2, 64); /* 2 serializers, 64 words */
McASPRxFmtMaskSet(mcAspAddr, 0xffff);
McASPTxFmtMaskSet(mcAspAddr, 0xffff);
McASPRxFmtSet(mcAspAddr, (MCASP_RX_SYNC_DELAY_0BIT | MCASP_RX_BITSTREAM_LSB_FIRST | MCASP_RX_PAD_WITH_0 | MCASP_RX_SLOTSIZE_32BITS | MCASP_RX_BUF_DMAPORT | MCASP_RX_ROT_RIGHT_NONE)); /*For I2S mode, McASPRxFmtI2SSet() can be used instead*/
McASPTxFmtSet(mcAspAddr, (MCASP_TX_SYNC_DELAY_0BIT | MCASP_TX_BITSTREAM_LSB_FIRST | MCASP_TX_PAD_WITH_0 | MCASP_TX_SLOTSIZE_32BITS | MCASP_TX_BUF_DMAPORT | MCASP_TX_ROT_RIGHT_NONE)); /*For I2S mode, McASPRxFmtI2SSet() can be used instead*/
McASPRxFrameSyncCfg(mcAspAddr, 0, MCASP_RX_FS_WIDTH_WORD, MCASP_RX_FS_EXT_BEGIN_ON_RIS_EDGE); /*The frame sync source is selected to be external*/
McASPTxFrameSyncCfg(mcAspAddr, 0, MCASP_TX_FS_WIDTH_WORD, MCASP_TX_FS_EXT_BEGIN_ON_RIS_EDGE); /*The frame sync source is selected to be external*/
McASPRxClkCfg(mcAspAddr, MCASP_RX_CLK_INTERNAL, 1, 1); /*The clock source is internal*/
McASPTxClkCfg(mcAspAddr, MCASP_TX_CLK_EXTERNAL, 1, 1); /*The clock source is external*/
/*Select The polarity of bit clock for reception : */
/*the DSP shifts the data out during the rising edge of the clock, the McASP receiver samples the data during the falling edge of the clock : */
McASPRxClkPolaritySet(mcAspAddr, MCASP_RX_CLK_POL_FALL_EDGE);
McASPTxClkPolaritySet(mcAspAddr, MCASP_TX_CLK_POL_FALL_EDGE);
McASPRxTimeSlotSet(mcAspAddr, 0); /*Select the time slots during which reception must happen*/
McASPTxTimeSlotSet(mcAspAddr, 0); /*Select the time slots during which reception must happen*/
McASPSerializerRxSet(mcAspAddr, 0); /*Set serializer 0 as receiver*/
McASPSerializerRxSet(mcAspAddr, 1); /*Set serializer 1 as receiver*/
/*McASPSerializerTxSet(mcAspAddr, 0); /*Set serializer 0 as receiver*/
/*McASPSerializerTxSet(mcAspAddr, 1); /*Set serializer 1 as receiver*/
McASPPinMcASPSet(mcAspAddr, MCASP_PIN_ACLKX | MCASP_PIN_AFSX | MCASP_PIN_AXR(0) | MCASP_PIN_AXR(1)); /*Configure the McASP pins to be used*/
McASPPinDirInputSet(mcAspAddr, MCASP_PIN_ACLKX | MCASP_PIN_AFSX | MCASP_PIN_AXR(0) | MCASP_PIN_AXR(1)); /*Configure the pin directions of the input pins*/
McASPTxRxClkSyncEnable(mcAspAddr); /* Synchronizes the transmitter and receiver Clocks */
McASPTxClkStart(mcAspAddr, MCASP_TX_CLK_EXTERNAL); /*Start the trasmitter clock*/
McASPRxClkStart(mcAspAddr, MCASP_RX_CLK_INTERNAL); /*Start the receiver clock*/
McASPRxIntEnable(mcAspAddr, MCASP_RX_DATAREADY); /*If DMA mode of transfer is to be used, enable the DMA transfer at this step. If interrupt mode of transfer is to be used, enable the interrupts here */
McASPTxIntEnable(mcAspAddr, MCASP_TX_DATAREADY); /*If DMA mode of transfer is to be used, enable the DMA transfer at this step. If interrupt mode of transfer is to be used, enable the interrupts here */
McASPRxSerActivate(mcAspAddr); /*Activate the receive serializers*/
/*McASPTxSerActivate(mcAspAddr); /*Activate the trasmitter serializers*/
/*McASPTxBufWrite(mcAspAddr, ); *If CPU polling mode/interrupt mode is used, write the TX buffer at this step*/
McASPRxEnable(mcAspAddr); /*Enable the receive state machine and frame sync*/
/* McASPTxEnable(mcAspAddr); /*Enable the trasmit state machine and frame sync*/
status = McASPRxStatusGet(mcAspAddr); /*If CPU polling method/interrupt method is used, before reading data from the receive buffer, the data ready bit must be polled*/
/*status = McASPTxStatusGet(mcAspAddr); If CPU polling method/interrupt method is used, before reading data from the receive buffer, the data ready bit must be polled*/
printf ("status 0x%x\n",status);
And this is the status of mcAsp 1 after init :
-> d 0x4803c000
NOTE: memory values are displayed in hexadecimal.
0x4803c000: 7b02 4430 0002 0000 0000 0000 0000 0000 *.{0D............*
0x4803c010: 0000 0000 0000 0000 0000 0000 0003 1000 *................*
0x4803c020: 0000 0000 0000 0000 0000 0000 0000 0000 *................*
0x4803c030: c291 0000 0000 0000 0001 0000 0000 0000 *................*
0x4803c040: 0000 0000 0203 0000 0000 0000 0000 0000 *................*
0x4803c050: 0000 0000 0000 0000 0000 0000 0000 0000 *................*
0x4803c060: 0207 0000 ffff 0000 00f0 0000 0010 0000 *................*
0x4803c070: 00a1 0000 8001 0000 0000 0000 0020 0000 *............ ...*
0x4803c080: 0104 0000 0000 0000 0000 0000 0000 0000 *................*
0x4803c090: 0000 0000 0000 0000 0000 0000 0000 0000 *................*
0x4803c0a0: 0207 0000 ffff 0000 00f0 0000 0010 0000 *................*
0x4803c0b0: 0081 0018 0001 0000 0000 0000 0020 0000 *............ ...*
0x4803c0c0: 010c 0000 017f 0000 0000 0000 0000 0000 *................*
0x4803c0d0: 0000 0000 0000 0000 0000 0000 0000 0000 *................*
0x4803c0e0: 0000 0000 0000 0000 0000 0000 0000 0000 *................*
0x4803c0f0: 0000 0000 0000 0000 0000 0000 0000 0000 *................*
Can you help ?
Thanks.
Eyal Blech.
