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DSP MMU0 Configuration on AM5728 with TI-RTOS

Christopher Peters
Genius 3380 points
Other Parts Discussed in Thread: AM5728

Looking for the preferred method for configuring the MMU0 contained in the DSP Subsystem on the AM5728 when using TI-RTOS.

I was hoping to find a MMU item in SYS/BIOS->Target Specific Support->C66->MMU, but do not see anything there.

I looked in pdk_am57xx_1_0_1 in ti/drv but also see nothing MMU related.

In ti/csl I see csl_mmu.h but I am not sure if that is the DSP MMU or the system MMU or what.  Though it does point to ti/csl/src/ip/mmu/dsp so that might be a good sign, but then there is MMU0 and MMU1, it is not clear how I differentiate between the two. 

Also, we might want to setup some BYPASS regions.  I see the registers are defined in the csl, but no functions.

Any pointers on how to setup MMU0 on the DSP for AM5728 would be greatly appreciated.

  • 0
    TI__Guru* 96960 points
    I moved your post to the device forum.

    Todd
  • 0 in reply to ToddMullanix
    Genius 3380 points
    Thanks, I never seem to chose right between RTOS and Device forums.
  • 0 in reply to Christopher Peters
    TI__Guru**** 393215 points

    This has been forwarded to the RTOS team.

  • 0 in reply to ToddMullanix
    TI__Genius 12805 points
    Here is what I suggest you do

    First look at the TRM www.ti.com/.../spruhz6e.pdf

    For the address of the MMU0 of the DSP you are interested in, say DSP2

    Then search for the base address in the pdk. For example, if the base address is 0x41501000 (page 378 in the TRM) search the pdk for 4150. You will find that there is a register include file packages\ti\csl\soc\am572x\src\cslr_soc_dsp_baseaddress.h that defines that address

    #define CSL_DSP_DSP2_MMU0CFG_REGS (0x41501000U)

    Next look at all the pdk files that mention CSL_DSP_DSP2_MMU0CFG_REGS and see if there is any function that does what you need.

    If not, since you have the base register address, and the TRM actually describes the registers that you need in details (see for example table 5-28 in the TRM) you can write your own csl function. (But I think that you will find what you need in pdk)


    Ran
  • 0 in reply to ran35366
    Genius 3380 points
    Ran, I do have the TRM open all day every day. LOL

    Using your suggestion, I don't find anything (other than the register addresses defined) related to DSP MMU configuration, so I guess the answer is no, there is no pdk support for the DSP configuring the MMU inside the DSP subsystem.

    I'll ask our ARM designer if he can setup the DSP MMU0 via Linux since he already will need to likely do that to map the DSP memory into DDR memory space.
  • 0 in reply to Christopher Peters
    TI__Guru** 116170 points

    Chris,

    I have some bare metal CSL code that you can use to configure the MMU.  I am attaching the code for your reference. Please let me know if this helps.

    0172.mmu_dsp_test.zip

    This is a quick read write test from memory before and after configuring the MMU. You can import the project in CCS and set the PDK_INSTALL_PATH variable defined in the project or provide your local PDK path there to build the project.

    Let me know if you have any issues.

    Regards,

    Rahul

    PS: The files mmu.c and dsp_config.c are already provided in the CSL package.

    • mmu.c can be found in the path \pdk_am57xx_1_0_x\packages\ti\csl\src\ip\mmu\dsp\V0\priv
    • dsp_config.c can be found in the path pdk_am57xx_1_0_x\packages\ti\csl\arch\c66x\src

    They are not included in the CSL library so you can simply link to those files instead of copying them over in your project.

  • 0 in reply to Rahul Prabhu
    Genius 3380 points
    It's going to take me some time to digest what your example was trying to do. I would have had no idea it took so many commands to configure the MMU. It would seem your example is setup to map some pretty specific memory regions. Could you maybe provide a brief overview of what the intent was behind your code?

    I think the take away from this is maybe to let the ARM manage my MMU. However, I think I am right that if we use the MMU for one thing, we need to use it for everything, well all the memory external to the DSP that is, so in our case the PCIE, the GPMC, OCMC_RAM, unless we use EDMA which uses MMU1 we did not plan on programming.

    Oh, I guess if the DSP wants to use GPIO, I have to map the L4_PER1 also.

    So, is this really true, if I use the MMU0 to map some memory space, I need to map all the memory spaces we want to use? Yikes.

    Maybe we just map 0x2000_0000 - 0x5FFF_FFFF as bypass and we have it all covered.
  • 0 in reply to Christopher Peters
    TI__Guru** 116170 points

    In this example DSP writes the pattern data at physical address 0x85000000 and 0x82000000 and then configures MMU TLB (Translation Look aside Buffer) and MMU TWL(Table walk through logic) to map these physical addresses to virtual addresses 0x81000000 and 0x88000000 as preserved entries to protect them against global flush. Then DSP then does the global flush and reads the data from virtual address. If the pattern matches as written to physical address then the MMU is configured successfully and entries are protected against global flush. On success the message is printed on CCS console. If the pattern does not match test failure message is displayed on the CCS console