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Regarding sync selection in VIP and DSS for AM5728

Other Parts Discussed in Thread: AM5728

Hi All

I am using GPEVM (AM5728) right now and we are planning our custom board on the same platform.

1.Video Input

We are planning to capture 3 16-bit 4:2:2 video inputs with embedded sync.

So in device tree i can write

bus-width = <16>

and skip hsync-active/vsync-active. Like that we will be able to capture 16-bit video in embedded sync??

2. Video Output

We are planning to put SDI serializer(GS2971) and a PAL encoder on LCD1 and LCD3 interface. We want the outputs to be 16-bit 4:2:2 with discrete sync.

So in device tree i can write

data-lines = <16>

and keep hsync-active/vsync-active. Like that we will be able to playback 16-bit video in discrete sync??


Does AM5728 support 16-bit 4:2:2 video output with discrete sync in all output ports LCD1, LCD2 and LCD3?

Hoping for a quick reply.


Regards

Amrit