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HWI with NDK not working

Other Parts Discussed in Thread: SYSBIOS

Hello all,

I am using a Tiva C TCM1294.

my goal is to send ADC values (of the internal temperature sensor) to my computer, via sockets. I am using TI-RTOS with NDK to provide the networking functionality. This part works. But, when I try integrate a HWI (triggered by the ADC) the NDK stops working. I am not sure why this is.

I have done the following experiments:

test the ADC independent of the networking code. I used a HWI, and it worked fine. 

test the the networking code independent of the ADC code, and it worked fine. 

It only breaks, when I combine the two.

here is the project, with. I have commented out HWI in the .cfg. Enabling the HWI, will break the networking code.

4762.proj.zip

Here is the main.c.  .Note: ledToggle is the HWI interrupt fired by the ADC. http://pastebin.com/raw/AUibTsXa 

Here is the java code, to connect to the board.

3632.java.zip

my project consists of the example tcp echo code, provide as an example. Together with the ADC initialisation.

Thanks

Daniel

  • Hi Daniel,
    Can you try re-enabling the Hwi in your .cfg file and make your ledToggle() function just an empty function and see if that works?
    Thanks,
    Janet
  • Hello Janet, I got it with three changes.

    1. I added ADCIntClear(ADC0_BASE, 0);

    2. I changed, ADCSequenceConfigure(ADC0_BASE, 0, ADC_TRIGGER_PROCESSOR, 0) to ADCSequenceConfigure(ADC0_BASE, 0, ADC_TRIGGER_PROCESSOR, 0);

    3. changed the interrupt priority of the HWI to something other than the default.

    This is the new code:

    I hope maybe you can explain something (file attached at the end)

    why do I need to change the HWI priority from non default. To futher emphasize this point, I have created a new project with two HWIs (a timer, and an ADC). The ADC and timer are meant to work in separate HWI's. This only works occurs when one of the HWI priorities is not default. I.e one of the HWI's priority is default (-1) and the other is a non default value, or the other way around. Why is this? I think this will help me answer my original problem.

    Thanks

    Daniel

    4786.proj2.zip

  • Hi Daniel,
    Adding ADCIntClear() makes sense, since otherwise no other ISR would run. I'm not sure what you changed in (2), since these are identical statements.
    In your .cfg file, you changed both interrupt priorities to 7. By doing this, you have made both these interrupts zero-latency and non-maskable. Furthermore, they will not be processed by the Hwi dispatcher, and therefore must not call any BIOS APIs. (Please check the cdoc for ti.sysbios.family.arm.m3.Hwi for further explanations).

    Can you go back to your original example and just apply (1) and (2) and see if that works? Your ADC interrupt handler must not make any BIOS calls since it is not going through the Hwi dispatcher.
    Best regards,
    Janet
  • hello Janet, thanks for all your help!

    If you don't mind. I would like to stick with the above example, as this will help with explaining the following question.

    Let me just say, I am a student, and just learning TI-RTOS for the first time.

    I was using the ti.sysbios.hal.Hwi module above, but now I will start to use the ti.sysbios.family.arm.m3.Hwi module.

    The following is bases on ti.sysbios.family.arm.m3.Hwi

    Based on my reading, it is not preferable to use zero latency interrupts, because you cannot use SYS/BIOS APIs? is this correct? zero latency interrupts are defined to be priority zero.

    I have also learnt that:
    All interrupts configured with equal or higher number than disablePriority are disabled by Hwi_disable. Interrupts configured with smaller number than disablePriority are non-maskable (ie zero-latency).The default setting is the second highest interrupt priority defined for the device. This results in priority 0 being the non-maskable interrupt priority. All other priorities are disabled with Hwi_disable().

    therefore I am assuming that the disablePriority is set to 1? based on the above. Because I cannot find this value anywhere. is this correct?

    you stated: "In your .cfg file, you changed both interrupt priorities to 7. By doing this, you have made both these interrupts zero-latency and non-maskable. " I don't really understand this? as priority 0 is the only one that is zero-latency and non-mask-table, why would 7 be?

    within the  ti.sysbios.family.arm.m3.Hwi module. Only priority 0 is zero-latency and non-maskable. All the other priorities lower than 1 (so 2-255) will be mask-able? is this correct.

    In regards to my original problem. if I implement the changes above, fyi before i was using ADC_TRIGGER_ALWAYS now i am using ADC_TRIGGER_PROCESSOR. I am using the ti.sysbios.family.arm.m3.Hwi

    But,if priority of the ADC any less than 32 ( 32 or less will be a zero-latency and non-maskable interrupt )the networking code does not run. help please!!!! I really do not want it to be a non-mask-able interrupt, because I would like to use BIOS API's in HWI. Here is the code2211.proj.zip

    Thanks again Janet!!

  • ok, so i tried something else. instead of calling ADCProcessorTrigger in the HWI, I called it in a task. http://pastebin.com/RthS9D9Y . and now everything seems to work. HWI > 32 (masking interrupt) and networking code is working. can I ask, why is this. Whi cannt I run ADCProcessorTrigger, in the HWI
  • Hi Daniel,
    Although the NVIC supports priority values of 0 - 255 (8-bits), the actual Tiva device only supports 8 priorities. The supported priorities are left-justified (i.e. use the upper 3 bits, not the lower). This results in the supported priorities being not 0-7, but 0x00, 0x20, 0x40,..., 0xe0. That is why, when you set your priority to 7, it results in a priority of 0. If you set the priority to anything from 32 - 63, the resulting priority will be 0x20.

    The disable priority for TM4C129 is 0x20. I'm not sure if that's explicitly stated anywhere, but it's whatever would result in a priority that is not 0 (0x00 - 0x1f are all equivalent to 0x00).

    I hope that makes sense. The cdoc for ti.sysbios.family.arm.m3.Hwi explains that in more detail.

    I'm not sure about why your ADCProcessorTrigger() doesn't work in a Hwi. Does it trigger any interrupt?

    Best regards,
    Janet
  • Daniel, and anyone at TI,

    I am also having an issue with ADCProcessorTrigger. Here's what happens:

    1. I use a proccesor trigger to kick off an ADC sequence

    2. When the sequence completes, an Hwi posts a Swi that reads the ADC data.

    3. There is a SysBios Timer running periodically that triggers an Swi. The Swi does some processing, and executes the next ADCProcessorTrigger.

    I ran all of this nicely baremetal with just standard interrupts. When I run with TIRTOS, however, as soon as I generate the second ADCProcessorTrigger, there is some error condition that results in a call to Exit. It may be that I'm trying to generate a processor trigger from an Swi.

    I would prefer not to have to drop to a task to generate a processor trigger, but it's looking like I might have to go that route.

    Any insight would be appreciated.

  • Hi Jake,

    If you haven't already, can you please open a new thread for the issue you are having?

    Thanks,

    Steve