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L2SRAM scrubbing

Ganz
Intellectual 770 points


We have a Secondary BootLoader(SBL) resides in L2SRAM. We want to enable the EDC from SBL. From my understanding we need to do memory scrubbing before enabling the EDC. Is it OK to setup IDMA to do L2SRAM scrubbing while the program resides in L2SRAM? It seems to work on test, but I would like to double check.

GanZ

  • 0
    TI__Guru* 81335 points
    Hi Ganz,
    From my understanding, memory scrubbing is an error correction technique in which a background process periodically inspects the contents of memory and fixes any errors or inconsistencies by replacing them with a functional copy of the data. So it should be OK.

    Thank you.
  • 0 in reply to Raja
    Intellectual 770 points
    Rajasekaran ,

    Document says that "Programs executing from L1P cache do not require additional consideration". What about L1D cache and L2 cache? Do they require scrubbing before enabling EDC?

    regards,

    GanZ
  • 0 in reply to Ganz
    TI__Genius 12805 points

    I may be wrong on this one but:

    As far as I know in  C6657 the L1D is not protected by EDC, (and L1P is has only parity check, no error correction)

    Using L2 as cache - if all cache lines are invalid before the cache starts, then a cache only get a complete cache line, and the ECC (or EDC) is calculated when the data comes into the cache..  You need not do crabbing to cache.

    You do however need to do it for L2 non-cache area if the data   comes from external source and it is not a complete cache line (or whatever the data size that the ECC is working on)

    Ran