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MAD-Utils and Boot-Image C6657

Hello Community,

now i am again stucked in creating a Boot image with ti-utilities.

What i have  successfully done:

Creating the NOR-Image for 1 Core -> flashing to the SPI-Nor and running from it after POR and Soft-Reset.

Tested the examples from the MAD-Utils (I saw the counters counting; connected via JTAG)

Tested my application after using MAD-Utils and Loaded via Jtag-> jumped to adress 0x9E001040-> ran both cores.

I did the following:

1. Copied my .out-File to app_1.bin and app_2.bin

2. ran maptool.py with option bypass-prelink (added neccessary sections before to the config-files)

3. tried to convert the c6657-le.bin with hex6x -a to an ASCII-File. at this point i got failures like: 

error: invalid option: rom1fs
error: invalid option: mal_app
error: illegal input character: 0x10
error: illegal input character: 0x02
error: illegal input character: 0x06
fatal error: cannot open input file "n.out": No such file or directory

4. i now tried to convert with the following .rmd-file:

myApp.out

-a
-boot
-e _c_int00

ROMS
{
ROM1: org = 0x0400, length = 0x1000000, memwidth = 32, romwidth = 32
files = { Refurbish_PCM.btbl }

}

i then got the failure: 

warning: nested command file: "myApp.out" ignored
fatal error: no input files provided

what am i doing wrong here?

I try to follow this post: e2e.ti.com/.../1544042

Thanks in advance for any answers

Martin

  • Hi Martin,

    I understand that you are working on direct SPI NOR booting on c6657. Are you running same application on both core0 and core1? Please confirm.
  • Hello Raja,

    many thanks for your quick reply.

    Yes i am working on direct SPI-Nor Booting on C6657.

    i run my application on core 0 and core 1 (same .out-file), my main looks like:

    ...some other code

    if(0==coreNum)

    {

           UartSendtask()

           DEVICE_REG32_W(KICK0, 0x83e70b13);

           DEVICE_REG32_W(KICK1, 0x95a4f1e0);

           DEVICE_REG32_W(BOOT_MAGIC_ADDR(1), (uint32_t)write_boot_magic_number);

           DEVICE_REG32_W(IPCGR(1), 1);

           BIOS_start();

    return(0);

    }

    else

    {

         write_boot_magic_number();  

    }

    void write_boot_magic_number(void)

    {

       UartWrite();

    }

     

    In case i load the programm into adress 0x9E000000 and set the PC to 0x9E001040 the application runs on both cores.

    Test like in  recommended.

    The application also runs if i load my "application.out"  to core0 and core 1.

    Thanks in advance for any answer

    Regards martin

  • Hi Martin,

    In this case, you do not need to use MAD utilities as you are running same out file on both cores. You can use DNUM to control the code execution across the cores.

    Thank you.
  • Hi Raja,
    many thanks for your answer.
    i tried what you suggested, unfortunatelly it does not work.....

    i have to load my app.out to both cores right?
    or only to Core0 because core0 starts the second one?

    Regards Martin
  • Hi Raja,

    i did some further tests of my application with following results:

    always load out-file via JTAG.

    a) i only load it to core 0 -> Core 1 seems not to be running, application hangs because Core1 does not release a semaphore.

    b) load it to both cores applications runs as expected.

    Convert the .out file with your tools to get a SPI-Nor bootable image system hangs like in a) given.

    can i assume that with

          DEVICE_REG32_W(KICK0, 0x83e70b13);

          DEVICE_REG32_W(KICK1, 0x95a4f1e0);

          DEVICE_REG32_W(BOOT_MAGIC_ADDR(1), (uint32_t)write_boot_magic_number);

          DEVICE_REG32_W(IPCGR(1), 1);

    will not be started?

    Thanks in advance for your answers

    Regards martin

  •  Please try below procedure in EVM and get back to me if you have any issues.

    1. Set the EVM in "No Boot" mode, connect to core0 and use gel file to initialize the core0.

    2. Go to memory browser, read the address 0x118FFFFC and make a note of it.

    3. Build the attached source and load and run on core0.

    4. After completion of execution, core0 will wait in busy loop(while(1)). Pause the debugging.

    5. Go to memory browser, enter the address 0x118FFFFC.=> 0xBABEFACE

    5008.evmc6657l.gel

    /******************************************************************************
     * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com
     *
     *  Redistribution and use in source and binary forms, with or without
     *  modification, are permitted provided that the following conditions
     *  are met:
     *
     *    Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     *    Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the
     *    distribution.
     *
     *    Neither the name of Texas Instruments Incorporated emac the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
     *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
     *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     *****************************************************************************/
    
    /**************************************************************************************
     * FILE PURPOSE: Boot Hello World Example
     **************************************************************************************
     * FILE NAME: boot_helloworld.c
     *
     * DESCRIPTION: A simple hello world example demonstrating boot.
     *
     ***************************************************************************************/
    #include <stdlib.h>
    #include <stdio.h>
    #include <string.h>
    #include "platform.h"
    
    #define DEVICE_REG32_W(x,y)   *(volatile uint32_t *)(x)=(y)
    #define DEVICE_REG32_R(x)    (*(volatile uint32_t *)(x))
    
    #define CHIP_LEVEL_REG  0x02620000
    #define KICK0           (CHIP_LEVEL_REG + 0x0038)
    #define KICK1           (CHIP_LEVEL_REG + 0x003C)
    
    /* Magic address RBL is polling */
    #ifdef _EVMC6657L_
    #define MAGIC_ADDR          0x8ffffc
    #endif
    
    #ifdef _EVMC6678L_
    #define MAGIC_ADDR          0x87fffc
    #endif
    
    #ifdef _EVMC6670L_
    #define MAGIC_ADDR          0x8ffffc
    #endif
    
    #define BOOT_MAGIC_ADDR(x)  (MAGIC_ADDR + (1<<28) + (x<<24))
    #define IPCGR(x)            (0x02620240 + x*4)
    
    #define NUMBER_OF_CORES 	2
    
    #define BOOT_MAGIC_NUMBER   0xBABEFACE
    
    #define BOOT_NUMBER0   0xAAAA5555
    #define BOOT_NUMBER1   0x11111111
    #define BOOT_NUMBER2   0x22222222
    #define BOOT_NUMBER3   0x33333333
    
    #define DDR_ADDR0       0x81000000
    #define DDR_ADDR1       0x82000000
    #define DDR_ADDR2       0x83000000
    #define DDR_ADDR3       0x84000000
    
    
    
    #define BOOT_UART_BAUDRATE         115200
    
    /* boot_helloworld version */
    char version[] = "01.00.00.01";
    
    /* OSAL functions for Platform Library */
    uint8_t *Osal_platformMalloc (uint32_t num_bytes, uint32_t alignment)
    {
    	return malloc(num_bytes);
    }
    
    void Osal_platformFree (uint8_t *dataPtr, uint32_t num_bytes)
    {
        /* Free up the memory */
        if (dataPtr)
        {
            free(dataPtr);
        }
    }
    
    void Osal_platformSpiCsEnter(void)
    {
        return;
    }
    
    void Osal_platformSpiCsExit (void)
    {
        return;
    }
    
    /******************************************************************************
     * Function:    write_uart
     ******************************************************************************/
    void
    write_uart
    (
        char*      msg
    )
    {
        uint32_t i;
        uint32_t msg_len = strlen(msg);
    
        /* Write the message to the UART */
        for (i = 0; i < msg_len; i++)
        {
            platform_uart_write(msg[i]);
        }
    }
    
    void
    write_boot_magic_number
    (
        void
    )
    {
        uint32_t                coreNum;
    
        coreNum = platform_get_coreid();
    
        DEVICE_REG32_W(MAGIC_ADDR, BOOT_MAGIC_NUMBER);
        
        while(1);
    }
    
    /******************************************************************************
     * Function:    main
     ******************************************************************************/
    void main ()
    {
        char                    version_msg[] = "\r\n\r\nBoot Hello World Example Version ";
        char                    boot_msg[80];
        platform_info           pform_info;
        uint32_t                coreNum, core;
    
        /* Initialize UART */
        coreNum = platform_get_coreid();
        if (coreNum == 0)
        {
            platform_uart_init();
            platform_uart_set_baudrate(BOOT_UART_BAUDRATE);
    
            printf("%s%s\n\n", version_msg, version);
    
            /* Unlock the chip registers */
            DEVICE_REG32_W(KICK0, 0x83e70b13);
            DEVICE_REG32_W(KICK1, 0x95a4f1e0);
    
            /* Writing the entry address to other cores */
            for (core = 1; core < NUMBER_OF_CORES; core++)
            {
                sprintf(boot_msg, "\r\n\r\nBooting Hello World image on Core %d from Core 0 ...", core);
                printf("%s\n",boot_msg);
                
                DEVICE_REG32_W(BOOT_MAGIC_ADDR(core), (uint32_t)write_boot_magic_number);
    
                /* Delay 1 sec */
                platform_delay(1);
            }
            for (core = 1; core < NUMBER_OF_CORES; core++)
            {
                /* IPC interrupt other cores */
                DEVICE_REG32_W(IPCGR(core), 1);
                platform_delay(1000);
            }
    
        }
        else
        {
            write_boot_magic_number();
        }
    
        while(1);
    }
    

    This means that core0 wakes up  core1 successfully. The value 0xBABEFACE  has been written by core1 from function "write_boot_magic_number()".

    Thank you.

  • Hello Raja,

    many thanks for your reply.

    I tried your procedure as described.

    Unfortunatelly when i run the application on core0 i do not see BABEFACE :(

    But:

    when i connect both cores and load the out-file to both cores ; run it then i see  BABEFACE !!!!!

    Do you have any further ideas?

    Regards martin

  • Hello Raja,

    at the given adress 0x118ffffC i only see 0x008088AC.

    I looked at this adress in memory browser and i see this is the adress of boot_magic_number.

    But this code is not executed by core 1.

    do i have to start the core1 in debug?

    Regards martin

  • Hi Martin,

    I hope you are working on custom C6657 board. Please confirm.

    One of our customer reported the same issue in below thread on custom board however it worked on EVM.

    Thank you.

  • The solution provided on the thread was,

    To wake up the second core, you should follow the instructions that are described in the TI documents and put the .code in the shared memory.
  • Hello Raja,

    many thanks for your reply.

    I read the posts and finally got BABEFACE @ the given adress location.

    The example is now linked to MSMCSRAM.

    I then added

       strcpy(uartmsgbuf,"Hello from Core 1\r\n");

       printf("Hello from Core 1\r\n");

       Uart_WriteString(uartmsgbuf);

       while(1)

       {

        platform_delay(100000);

        Uart_WriteString(uartmsgbuf);

       }


    to the "write_boot_magic_number()" function for testing..............

    No output on console or uart...... :(

    only when i load this code seperatly to core 1 it runs as expected....

    Do you know some other methods or solutions?

    Regards 

    Martin

    this is my .cmd-File

    -c
    -heap 0x41000
    -stack 0xa000

    /* Memory Map 1 - the default */
    MEMORY
    {
    L1PSRAM (RWX) : org = 0x0E00000, len = 0x7FFF
    L1DSRAM (RWX) : org = 0x0F00000, len = 0x7FFF

    L2SRAM (RWX) : org = 0x1800000, len = 0x080000                               /*my testing*/
    L2SRAM_2 (RWX) : org = 0x11800000, len = 0x080000                         /*my testing*/
    MSMCSRAM (RWX) : org = 0xc000000, len = 0x100000
    DDR3 (RWX) : org = 0x80000000,len = 0x20000000
    }

    SECTIONS
    {
    .code > MSMCSRAM
    .csl_vect > MSMCSRAM
    .text > MSMCSRAM
    GROUP (NEAR_DP)
    {
    .neardata
    .rodata
    .bss
    } load > MSMCSRAM
    .stack > MSMCSRAM
    .cinit > MSMCSRAM
    .cio > MSMCSRAM
    .const > MSMCSRAM
    .data > MSMCSRAM
    .switch > MSMCSRAM
    .sysmem > MSMCSRAM
    .far > MSMCSRAM
    .testMem > MSMCSRAM
    .fardata > MSMCSRAM
    platform_lib > MSMCSRAM
    .code > MSMCSRAM                /*as given from the e2e*/
    }

    The application is a project without RTSC

  • Further results :

    it seems the TSC is not readable by Core1 ?
    i loaded the app to core0; let it run-> pause the programm-> connected to core1-> loaded symbols-> core is stuck in platform_delaycycles() because TSCL is always Zero.
    on Core0 i see the TSC running....

    regards martin
  • Hello Raja,
    Now i got all to running state, reason was the TSC not running on second core.
    I added "TSCL=0;" to function "write_boot_magic_number" and my app worked as expected.

    Many Thanks again for your help
    Regards
    Martin
  • Hi Martin,
    Thank you so much for the update. We are glad that the issue has been resolved.