Hi TI Experts,
Please let me confirm the following question.
[Question.1]
There is not the DPLL_ABE part on AM572x. Is my understanding correct?
[Question.2]
On AM572x evaluation board, it is used the 22.5792MHz clock for Audio interface. When it supports the 44.100kHz sampling rate, is the DPLL_ABE disabled(Bypass) this 22.5792MHz clock? Does AM572x divide the 22.5792MHz on CM_CORE_AON_MCASP1?
If you have any question, please let me know.
Best regards.
Kaka
