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SPI0 problem...

Todd Anderson78572
Guru 14640 points


All:

CCS 6.1.1

Starterware_1_10_04_01

I am working with a target which has 50 MHz input clock, and the following is done to get PLL0 and PLL1 working:

 #define PLL_CLK_SRC             1
 #define PLL0_MUL                     26  // for 337.5 MHz.
 #define PLL0_PREDIV               3   //  for 337.5 MHz.
 #define PLL0_POSTDIV            0
 #define PLL0_DIV1                    0
 #define PLL0_DIV3                    2
 #define PLL0_DIV7                    6 

I found a problem with InitPLL0() - if DIV1 is zero, then the derived values for DIV2, DIV4, and DIV6 are also zero.

I made a change to allow for DIV2 to be 1, which resulted in 168.75 MHz.

When in emulation mode, I can get SPI0 to work - I am able to run at 18.75 MHz.

(By the way, SPI1 is set for 150 MHz, and can run with no problem at 25 MHz.)

However, when I try standalone mode, SPI0 does not get interrupts, and if I comment out the code that deals with setting up and running SPI0, the SPI1 runs fine.

I am scratching my head, trying to find the problem, but I also wanted to post in case someone else has dealt with this!

 

  • 0
    Guru 14640 points

    One further clarification:

    As an experiment, I backed off the system frequency to 300 MHz, which gave me a PLL0 SYSCLOCK2 of 150 MHz, and PLL1 SYSCLOCK2 of 150 MHz, so SPI0 and SPI1 were running with the "same" input frequency. Again, SPI1 runs fine, but I am not able to get interrupts with SPI0. So backing off on the frequency did not help...

    Again, in emulation mode, SPI0 and SPI1 will send and receive data at 25 MHz SPI CLK rates. (I am connecting to an FPGA, which does a "wrap" of the data, delayed by a clock cycle, so when I output a 0x55, I receive a 0x2A, which is the expected return.)

  • 0
    TI__Guru** 116100 points
    Dear Todd,

    However, when I try standalone mode, SPI0 does not get interrupts, and if I comment out the code that deals with setting up and running SPI0, the SPI1 runs fine.

    If SPI1 is working good in both ways (standalone & emulation mode) and SPI0 is not working in standalone mode.
    It seems, some configuration setting is missing for SPI0.
    Gel file might have configured correctly when its in emulation mode and some SPI0 configuration setting is missing in standalone mode (that settings may require in AIS config or bootloader code)

    The important difference between SPI0 and SPI1 is PSC domain.
    SPI0 is in PCS0 domain whereas SPI1 is in PSC1.

    This is for SPI1:
    /* Waking up the SPI1 instance. */
    PSCModuleControl(SOC_PSC_1_REGS, HW_PSC_SPI1, PSC_POWERDOMAIN_ALWAYS_ON,
    PSC_MDCTL_NEXT_ENABLE);


    This is for SPI0:
    /* Waking up the SPI0 instance. */
    PSCModuleControl(SOC_PSC_0_REGS, HW_PSC_SPI0, PSC_POWERDOMAIN_ALWAYS_ON,
    PSC_MDCTL_NEXT_ENABLE);

    Also, please look into the AIS config settings.
    Dump the SPI1 and SPI0 registers in standalone mode and compare the SPI0 (not working) and SPI1 (working) status & interrupt registers to see any difference.

    I hope this helps.
  • 0 in reply to Titusrathinaraj Stalin
    Guru 14640 points
    Thanks, TitusI will be looking into those items.
  • 0 in reply to Todd Anderson78572
    Guru 14640 points

    Titus:

    One parameter was wrong -

    This is for SPI0:
    /* Waking up the SPI0 instance. */
    PSCModuleControl(SOC_PSC_0_REGS, HW_PSC_SPI0, PSC_POWERDOMAIN_ALWAYS_ON,
    PSC_MDCTL_NEXT_ENABLE);

    I had SOC_PSC_1_REGS instead of SOC_PSC_0_REGS.

     

  • 0 in reply to Todd Anderson78572
    TI__Guru** 116100 points
    Superb. Sounds good!
    Thanks for the update.
  • 0 in reply to Titusrathinaraj Stalin
    Guru 14640 points
    By the way, I was wrong in the PLL0Init() - it works correctly, even with div1 = 0.
  • 0 in reply to Todd Anderson78572
    TI__Guru** 116100 points
    Superb. Thanks for the update.