AM335x Reserved flag values in PRM_RSTST register

Ankur Tank

we are using Am335x based custom board,

We are reading PRM_RSTST register to get the reset reason.

Now as there are couple of reserved bits in that register( RO and RW), whose values are shown as 0h at reset.

My question is, is there any chance that this reserved bits will be 1 at any point in time ? Can we trust that reserved bits will contain value 0 ?

I know we should mask reserved bit value and use other bits, however I am trying to understand how reserved bits would behave in normal operation?

Any suggestions/pointers/help ?

Thank you,

Regards,

Ankur

over 9 years ago

0 Biser Gatchev-XID over 9 years ago

TI__Guru**** 393215 points

Reserved bits in PRM_RSTST will contain 0 at reset time only. There is no guarantee of their behavior at run-time. From AM335X TRM Rev. M Table 8-197: "Rreturns0s" are read-only bits, which will always return 0, but "R/W1toClr" are read-write bits, which may change their value at run-time and can be cleared by writing 1 to them.

0 Ankur Tank over 9 years ago in reply to Biser Gatchev-XID

Expert 2985 points

Thank you For reply Guru Biser.
So in summery reserved R/W bit can change and can be cleared by either writing 0 if it is R/W-0h or Cleared by writing 1 if it is R/W-1h

0 Biser Gatchev-XID over 9 years ago in reply to Ankur Tank

TI__Guru**** 393215 points

There are no reserved "R/W-0" bits in this registers. Only reserved bits 2 and 3 are "R/W1toClr" and they can be cleared by writing 1 to them. All other reserved bits are read-only and they return 0 when read.

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AM335x Reserved flag values in PRM_RSTST register