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Adding support for SPI flash in kernel.

RAI SANTOSH
Intellectual 520 points

Hi Biser,

I am able to do SPI flash locking in U-boot.

Now when I am booting my kernel at that time I am not able to get any detection of my SPI flash in kernel log.I am using kernel version 3.14.26.

Here my all the device configuration I have did in dts file.

Even I am using SPI1-> CS0 , the same I have mentioned in my dts file.

But no mtd device is enumerating in kernel log.

Please suggest a way.

Rgs,

Santosh

  • 0
    TI__Guru**** 393215 points
    If your SPI flash is password protected there is no way for the kernel SPI driver to enumerate it. You must unlock it beforehand.
  • 0 in reply to Biser Gatchev-XID
    TI__Guru**** 393215 points
    As a second thought, check D0 and D1 directions in your .DTS file. MISO and MOSI may be reversed.
  • 0 in reply to Biser Gatchev-XID
    TI__Guru**** 393215 points
    Yes, that should be it. Password protection does not disable reading the flash.
  • 0 in reply to Biser Gatchev-XID
    Intellectual 520 points

    Hi Biser,

    It's not possible because we are able to enumerate the same device in our other products in that we have used mindspeed processor.

    Thus it's possible.

    Please check.

  • 0 in reply to RAI SANTOSH
    TI__Guru**** 393215 points
    Check my latest posts.
  • 0 in reply to Biser Gatchev-XID
    Intellectual 520 points
    Hi biser,

    I had verified that at the initial stage.
    Cs is UAR0 rtsnb pull up output , spi so is mcasp0 fsx as input, spi si mcasp0 axr0 as output and clk as mcasp0 aclkx as output pin .
    Thus there is no problem with pin connections
    Can you tell me kernel configuration parameters.
  • 0 in reply to RAI SANTOSH
    TI__Guru**** 393215 points
    Please post the SPI section of your .DTS file.
  • 0 in reply to Biser Gatchev-XID
    Intellectual 520 points

    Hi Biser,

    dtsi file portion of SPI:

    spi0: spi@48030000 {
    compatible = "ti,omap4-mcspi";
    #address-cells = <1>;
    #size-cells = <0>;
    reg = <0x48030000 0x400>;
    interrupts = <65>;
    ti,spi-num-cs = <2>;
    ti,hwmods = "spi0";
    dmas = <&edma 16
    &edma 17
    &edma 18
    &edma 19>;
    dma-names = "tx0", "rx0", "tx1", "rx1";
    status = "disabled";
    };

    spi1: spi@481a0000 {
    compatible = "ti,omap4-mcspi";
    #address-cells = <1>;
    #size-cells = <0>;
    reg = <0x481a0000 0x400>;
    interrupts = <125>;
    ti,spi-num-cs = <2>;
    ti,hwmods = "spi1";
    dmas = <&edma 42
    &edma 43
    &edma 44
    &edma 45>;
    dma-names = "tx0", "rx0", "tx1", "rx1";
    status = "disabled";
    };

    DTS file contain:

    &spi1 {
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&spi1_pins_default>;
    pinctrl-1 = <&spi1_pins_sleep>;
    /*MATRIX: SPI is working on a fixed clock frequency of 48MHZ.
    Thus it is not mentioned in a dtsi or dts files. */
    status = "okay";

    };

    spi1_pins_default: spi1_pins_default {
    pinctrl-single,pins = < /* MATRIX: this pins used for SPI FLash */
    0x16c (PIN_OUTPUT_PULLUP | MUX_MODE5) /* MATRIX: spi1_cs0 */
    0x194 (PIN_INPUT| MUX_MODE3) /* MATRIX: spi1_so (slave output) */
    0x198 (PIN_OUTPUT | MUX_MODE3) /* MATRIX: spi1_si (slave input)*/
    0x190 (PIN_OUTPUT | MUX_MODE3) /* MATRIX: spi1_clk */
    >;
    };

    spi1_pins_sleep: spi1_pins_sleep {
    pinctrl-single,pins = < /* MATRIX: this pins used for SPI FLash */
    0x16c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* MATRIX: spi1_cs0 */
    0x194 (PIN_OUTPUT | MUX_MODE7) /* MATRIX: spi1_si */
    0x198 (PIN_INPUT | MUX_MODE7) /* MATRIX: spi1_s0 */
    0x190 (PIN_OUTPUT | MUX_MODE7) /* MATRIX: spi1_clk */
    >;
    };

    Please check .

    Rgs,

    Santosh Rai.

  • 0 in reply to RAI SANTOSH
    TI__Guru**** 161600 points

    Hi,

    I tested this on my BBB, running kernel 3.14 (SDK1.00.00.03). I used the following spi settings:

              spi1_pins: spi1_pins {

                pinctrl-single,pins = <

                      0x190 (PIN_INPUT_PULLUP | MUX_MODE3)  /*MCASP0_ACLKX.spi1_clk*/

                      0x194 (PIN_INPUT_PULLUP | MUX_MODE3)  /*MCASP0_FSX.spi1_d0*/

                      0x198 (PIN_OUTPUT_PULLUP | MUX_MODE3)  /*MCASP0_AXR0.spi1_d1*/

                      0x19c (PIN_OUTPUT_PULLUP | MUX_MODE3)  /*MCASP0_AHCLKR.spi1_cs0*/

                >;

          };

          

    &spi1 {
             pinctrl-names = "default";
             pinctrl-0 = <&spi1_pins>;
             status = "okay";
             spidev@1 {
                       spi-max-frequency = <24000000>;
                       reg = <0>;
                       compatible = "linux,spidev";
            };
    };

    And managed to see the SPI clk & data pins toggling on the scope, after I executed echo "A5A5A5" > /dev/spidev1.0. 

    Best Regards, 
    Yordan

  • 0 in reply to Yordan Kovachev
    Intellectual 520 points

    HI YK,

    I want tto use an m25p80 driver for my flash.

    Because using this driver I can unlock and lock my flash.

    Here using compatible string it will use other drivers.

    Rgs,

    Santosh Rai

  • 0 in reply to RAI SANTOSH
    Intellectual 520 points
    HI All,

    Here what yordan did SPI_CLK as input pin but in my system ARM McSPI is working as master thus I need to make that pin as output pin.
    In my schematic I have used pulled-up CS line only.rest of the pins either input or output.

    Please HELP not able to resolve this.

    Rgs,
    Santosh
  • 0 in reply to RAI SANTOSH
    Intellectual 520 points
    Hi All,

    I am still suffering from the issue of SPI flash read/write in kernel.


    Rgs,
    Santosh
  • 0 in reply to RAI SANTOSH
    TI__Guru**** 393215 points

    RAI SANTOSH said:
    Here what yordan did SPI_CLK as input pin but in my system ARM McSPI is working as master thus I need to make that pin as output pin. 

    Read Note 1 under Table 24-4 in the AM335x TRM Rev. M.

  • 0 in reply to Biser Gatchev-XID
    Intellectual 520 points

    HI Biser ,

    I have did that change also made my clk pin as input enable.

    But at that time also its reading FF from the flash.

    Rgs,

    Santosh Rai

  • 0 in reply to Biser Gatchev-XID
    Intellectual 520 points

    Hi All,

    I am having as issue while testing my SPI interface.

    One test process I am following is

    Use the MTD interface provided for SPI flash on the EVM to validate the SPI driver interface.

    The below step copies 8KiB from /dev/mtd2 partition (u-boot env) to /dev/mtd4 partition and reads

    the 8KiB image from /dev/mtd4 to a file and checks the md5sum. The md5sum of test.img and test1.img should be same.

    cd /tmp

    dd if=/dev/mtd2 of=test.img bs=8k count=1

    md5sum test.img

    flash_eraseall /dev/mtd4

    cp test.img /dev/mtd4

    dd if=/dev/mtd4 of=test1.img bs=8k count=1

    md5sum test1.img

    But while testing found that this test process is not Ok,

    The reason is as logs are,

     # ls -l /dev/mtd0
    crw-r--r--    1 root     root       90,   0 Jan 21 05:08 [1;35m/dev/mtd0[0m
    ~ #
    ~ # cd /tmp
    /tmp #
    /tmp # dd if=/dev/mtd6 of=test.img bs=8k count=1

    1+0 records in
    1+0 records out
    8192 bytes (8.0KB) copied, 0.001909 seconds, 4.1MB/s
    /tmp #
    /tmp # ls -l /dev/mtd0

    crw-r--r--    1 root     root       90,   0 Jan 21 05:08 [1;35m/dev/mtd0[0m
    /tmp #
    /tmp # md5sum test.img

    f88e19038a28306e716d0346d6112546  test.img
    /tmp #
    /tmp # flash_eraseall /dev/mtd0

    flash_eraseall has been replaced by `flash_erase <mtddev> 0 0`; please use it

    Erasing 64 Kibyte @ 0 --  0 % complete
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    /tmp #
    /tmp # ls -l /dev/mtd0

    crw-r--r--    1 root     root       90,   0 Jan 21 05:08 [1;35m/dev/mtd0[0m
    /tmp #
    /tmp # cp test.img /dev/mtd0

    /tmp #
    /tmp # ls -l /dev/mtd0

    -rw-r--r--    1 root     root          8192 Jan 21 05:14 [0;0m/dev/mtd0[0m
    /tmp #
    /tmp #

    ////////Here clearly while issuing cp command it is removing the driver file and generating a new regular kind of file.

    Thus then after data I will read from the mtd0 file will actully not use my SPI interface.

    Please check and help!

    Rgs,

    Santosh

  • 0 in reply to RAI SANTOSH
    Intellectual 520 points
    Hi All,

    My dtsi file configuration:


    spi1: spi@481a0000 {
    compatible = "ti,omap4-mcspi";
    #address-cells = <1>;
    #size-cells = <0>;
    reg = <0x481a0000 0x400>;
    interrupts = <125>;
    ti,spi-num-cs = <1>;
    ti,hwmods = "spi1";
    dmas = <&edma 42
    &edma 43
    &edma 44
    &edma 45>;
    dma-names = "tx0", "rx0", "tx1", "rx1";
    status = "disabled";
    };


    Dts file configguration:

    &spi1 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&spi1_pins_default>;
    /*MATRIX: SPI is working on a fixed clock frequency of 48MHZ.
    Thus it is not mentioned in a dtsi or dts files. */
    spidev@0 {
    compatible = "m25p80";
    reg = <0>;
    spi-max-frequency = <48000000>;
    };
    };

    spi1_pins_default: spi1_pins_default {
    pinctrl-single,pins = < /* MATRIX: this pins used for SPI FLash */
    0x16c (0x15) /* MATRIX: spi1_cs0 */
    0x194 (0x23) /* MATRIX: spi1_so (slave output) */
    0x198 (0x03) /* MATRIX: spi1_si (slave input)*/
    0x190 (0x23) /* MATRIX: spi1_clk */
    >;
    };


    Is there any configguration issue is present in my dts file?
    Please HELP.

    Rgs,
    Santosh Rai
  • 0 in reply to RAI SANTOSH
    TI__Guru**** 161600 points
    Hi,

    By default m25p80 is built as loadable module in TISDK kernel 3.14 => CONFIG_MTD_M25P80=m. Have you tried changing this to CONFIG_MTD_M25P80=y? Or if not, have you insmoded the m25p80.ko driver?

    Have you tried adding the spi-nor dts node? Should look something like:

    &spi1 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&spi1_pins_default>;
    spi-flash@0 {
    compatible = "m25p80";
    reg = <0>;
    spi-max-frequency = <48000000>;
    #address-cells = <1>;
    #size-cells = <1>;
    };
    };

    Best Regards,
    Yordan
  • 0 in reply to Yordan Kovachev
    Intellectual 520 points

    Hi yk,

    I had made driver as statically compiled with the kernel.

    And then after changed DTS file as u suggested . but still suffering an issue.

    Rgs,

    Santosh

  • 0 in reply to RAI SANTOSH
    Intellectual 415 points

    Hi,
    Im able to access spi flash.. this is my dts entry

    &spi0 {
    pinctrl-names = "default";
    pinctrl-0 = <&spi0_pins>;
    status = "okay";

    flash: m25p80@0 {
    #address-cells = <1>;
    #size-cells = <1>;
    compatible = "spansion,m25p80";
    spi-max-frequency = <48000000>;
    reg = <0>;

    partition@0 {
    label = "NOR.env1";
    reg = <0x0A0000 0x010000>;
    };

    partition@1 {
    label = "NOR.env2";
    reg = <0x0B0000 0x010000>;
    };

    };
    };

    and I use flashcp from user space to write an image.

  • 0 in reply to RAI SANTOSH
    TI__Guru**** 161600 points
    Hi,

    Did you verify that your spi interface is working properly (probe the pins with a scope)?

    What is the vendor of the spi-flash chip? Can you send link to its datasheet? Is it possible to try with another chip?

    Best Regards,
    Yordan
  • 0 in reply to sooraj r k
    Intellectual 520 points

    HI Sooraj,

    Can you please share me your pin configuration.

    As well as can you share how you are using flashcp in your user space.

    Which SPI flash you are using?

    Rgs,

    Santosh Rai

  • 0 in reply to RAI SANTOSH
    Intellectual 520 points
    Hi YK,


    Device which we are using is spansion (sfl128) SPI nor flash.
    No other SPI flash is present with me to test .

    Rgs,
    Santosh Rai
  • 0 in reply to RAI SANTOSH
    Intellectual 520 points
    Hi YK,

    Even I have checked on scope for CS , CLK and SDO pins .
    CS and CLK are working fine is seems because when I am using SPI interface at that time CS and CLK deflection I can see but cannot find any action on SDO pin.

    Rgs,
    Santosh.
  • 0 in reply to RAI SANTOSH
    Intellectual 415 points
    hi santhosh,

    spansion s25fl164k is my spi nor flash..

    pin configuration

    spi0_pins: spi0_pins_default {
    pinctrl-single,pins = <
    0x150 ( PIN_INPUT | MUX_MODE0 ) /* (A18) spi0_sclk.spi0_sclk */
    0x154 ( PIN_INPUT | MUX_MODE0 ) /* (B18) spi0_d0.spi0_d0 */
    0x158 ( PIN_INPUT | MUX_MODE0 ) /* (B17) spi0_d1.spi0_d1 */
    0x15c ( PIN_OUTPUT | MUX_MODE0 ) /* (A17) spi0_cs0.spi0_cs0 */
    >;
    };

    flashcp example

    flashcp MLO.byteswap /dev/mtd0
  • 0 in reply to sooraj r k
    Intellectual 415 points

    hi,

    Check whether your flash is listed in
      static const struct spi_device_id m25p_ids
    in file   drivers/mtd/devices/m25p80.c..

    If not you will have to add