PMIC probe problem

U-Boot SPL 2014.07-00107-gd28f2b9-dirty (Apr 22 2016 - 18:45:53)
reading args
spl_load_image_fat_os: error reading image args, err - -1
reading u-boot.img
reading u-boot.img


U-Boot 2014.07-00107-gd28f2b9-dirty (Apr 22 2016 - 18:45:53)

I2C:   ready
DRAM:  512 MiB
NAND:  256 MiB
MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
reading uboot.env

** Unable to read "uboot.env" from mmc0:1 **
Using default environment

Net:   Net Initialization Skipped
No ethernet found.
Hit any key to stop autoboot:  1  0 
U-Boot# 
U-Boot# 
U-Boot# 
U-Boot# 
U-Boot# 
U-Boot# fatload mmc 0  0x80F80000 am335x-evm.dtb
reading am335x-evm.dtb
39244 bytes read in 19 ms (2 MiB/s)
U-Boot# fatload mmc 0 0x80007FC0 uImage
reading uImage
3751664 bytes read in 506 ms (7.1 MiB/s)
U-Boot# setenv bootargs console=ttyO0,115200n8 root=/dev/mmcblk0p2 ro rootfstype=ext4 rootwait
U-Boot# bootm 0x80007FC0 - 0x80F80000
## Booting kernel from Legacy Image at 80007fc0 ...
   Image Name:   Linux-3.14.26-g07d13c6-dirty
   Created:      2016-04-22   9:52:10 UTC
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    3751600 Bytes = 3.6 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 80f80000
   Booting using the fdt blob at 0x80f80000
   XIP Kernel Image ... OK
   Loading Device Tree to 8fff3000, end 8ffff94b ... OK

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 3.14.26-g07d13c6-dirty (atl@diversense) (gcc version 4.8.4 (Ubuntu/Linaro 4.8.4-2ubuntu1~14.04.1) ) #6 SMP Fri Apr 22 15:21:49 IST 2016
[    0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[    0.000000] Machine model: TI AM335x EVM
[    0.000000] cma: CMA: reserved 16 MiB at 9e800000
[    0.000000] Memory policy: Data cache writeback
[    0.000000] CPU: All CPU(s) started in SVC mode.
[    0.000000] AM335X ES2.1 (neon )
[    0.000000] PERCPU: Embedded 9 pages/cpu @df9d1000 s13824 r8192 d14848 u36864
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 129536
[    0.000000] Kernel command line: console=ttyO0,115200n8 root=/dev/mmcblk0p2 ro rootfstype=ext4 rootwait
[    0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes)
[    0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
[    0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
[    0.000000] Memory: 487964K/522240K available (4774K kernel code, 652K rwdata, 1904K rodata, 365K init, 5464K bss, 34276K reserved, 0K highmem)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vector  : 0xffff0000 - 0xffff1000   (   4 kB)
[    0.000000]     fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
[    0.000000]     vmalloc : 0xe0800000 - 0xff000000   ( 488 MB)
[    0.000000]     lowmem  : 0xc0000000 - 0xe0000000   ( 512 MB)
[    0.000000]     pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
[    0.000000]     modules : 0xbf000000 - 0xbfe00000   (  14 MB)
[    0.000000]       .text : 0xc0008000 - 0xc068db94   (6679 kB)
[    0.000000]       .init : 0xc068e000 - 0xc06e9600   ( 366 kB)
[    0.000000]       .data : 0xc06ea000 - 0xc078d2e8   ( 653 kB)
[    0.000000]        .bss : 0xc078d2e8 - 0xc0ce3414   (5465 kB)
[    0.000000] Hierarchical RCU implementation.
[    0.000000] 	RCU restricting CPUs from NR_CPUS=2 to nr_cpu_ids=1.
[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
[    0.000000] NR_IRQS:16 nr_irqs:16 16
[    0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts
[    0.000000] Total of 128 interrupts on 1 active controller
[    0.000000] OMAP clockevent source: timer2 at 24000000 Hz
[    0.000033] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 178956969942ns
[    0.000149] OMAP clocksource: timer1 at 24000000 Hz
[    0.002312] Console: colour dummy device 80x30
[    0.097184] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
[    0.097221] ... MAX_LOCKDEP_SUBCLASSES:  8
[    0.097246] ... MAX_LOCK_DEPTH:          48
[    0.097269] ... MAX_LOCKDEP_KEYS:        8191
[    0.097292] ... CLASSHASH_SIZE:          4096
[    0.097316] ... MAX_LOCKDEP_ENTRIES:     16384
[    0.097339] ... MAX_LOCKDEP_CHAINS:      32768
[    0.097361] ... CHAINHASH_SIZE:          16384
[    0.097385]  memory used by lock dependency info: 3695 kB
[    0.097410]  per task-struct memory footprint: 1152 bytes
[    0.097543] Calibrating delay loop... 297.36 BogoMIPS (lpj=1486848)
[    0.157215] pid_max: default: 32768 minimum: 301
[    0.158254] Security Framework initialized
[    0.158581] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.158621] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.230731] CPU: Testing write buffer coherency: ok
[    0.234161] CPU0: thread -1, cpu 0, socket -1, mpidr 0
[    0.234318] Setting up static identity map for 0x80489720 - 0x80489790
[    0.243239] Brought up 1 CPUs
[    0.243285] SMP: Total of 1 processors activated.
[    0.243313] CPU: All CPU(s) started in SVC mode.
[    0.251523] devtmpfs: initialized
[    0.278519] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
[    0.393910] omap_hwmod: tptc0 using broken dt data from edma
[    0.395011] omap_hwmod: tptc1 using broken dt data from edma
[    0.396082] omap_hwmod: tptc2 using broken dt data from edma
[    0.415366] omap_hwmod: debugss: _wait_target_disable failed
[    0.498223] pinctrl core: initialized pinctrl subsystem
[    0.510955] regulator-dummy: no parameters
[    0.521293] NET: Registered protocol family 16
[    0.537540] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.553843] cpuidle: using governor ladder
[    0.553908] cpuidle: using governor menu
[    0.583794] syscon 44e10000.control_module: regmap [mem 0x44e10000-0x44e107fb] registered
[    0.595332] platform 49000000.edma: alias fck already exists
[    0.595426] platform 49000000.edma: alias fck already exists
[    0.595487] platform 49000000.edma: alias fck already exists
[    0.607948] OMAP GPIO hardware version 0.1
[    0.697092] omap-gpmc 50000000.gpmc: could not find pctldev for node /pinmux@44e10800/nandflash_pins_default, deferring probe
[    0.697398] platform 50000000.gpmc: Driver omap-gpmc requests probe deferral
[    0.729293] No ATAGs?
[    0.729358] hw-breakpoint: debug architecture 0x4 unsupported.
[    0.880901] bio: create slab <bio-0> at 0
[    1.000985] edma-dma-engine edma-dma-engine.0: TI EDMA DMA engine driver
[    1.006880] vmmcsd_fixed: 3300 mV 
[    1.011737] vbat: 5000 mV 
[    1.014716] lis3_reg: no parameters
[    1.019347] wlan-en-regulator: 1800 mV 
[    1.036828] i2c-core: driver [palmas] using legacy suspend method
[    1.036875] i2c-core: driver [palmas] using legacy resume method
[    1.041849] SCSI subsystem initialized
[    1.044520] usbcore: registered new interface driver usbfs
[    1.045769] usbcore: registered new interface driver hub
[    1.048881] usbcore: registered new device driver usb
[    1.053550] omap_i2c 44e0b000.i2c: could not find pctldev for node /pinmux@44e10800/pinmux_i2c0_pins, deferring probe
[    1.053657] platform 44e0b000.i2c: Driver omap_i2c requests probe deferral
[    1.053823] omap_i2c 4802a000.i2c: could not find pctldev for node /pinmux@44e10800/pinmux_i2c1_pins, deferring probe
[    1.053898] platform 4802a000.i2c: Driver omap_i2c requests probe deferral
[    1.070650] omap-mailbox 480c8000.mailbox: omap mailbox rev 0x400
[    1.087896] Switched to clocksource timer1
[    1.499128] hw perfevents: enabled with ARMv7 Cortex-A8 PMU driver, 5 counters available
[    1.520385] futex hash table entries: 256 (order: 2, 16384 bytes)
[    1.926224] VFS: Disk quotas dquot_6.5.2
[    1.926851] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
[    1.931028] jffs2: version 2.2. (NAND) (SUMMARY)  © 2001-2006 Red Hat, Inc.
[    1.932181] msgmni has been set to 985
[    1.940147] io scheduler noop registered
[    1.940208] io scheduler deadline registered
[    1.940372] io scheduler cfq registered (default)
[    1.949090] pinctrl-single 44e10800.pinmux: 142 pins at pa f9e10800 size 568
[    2.067564] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[    2.091391] omap_uart 44e09000.serial: no wakeirq for uart0
[    2.093066] 44e09000.serial: ttyO0 at MMIO 0x44e09000 (irq = 88, base_baud = 3000000) is a OMAP UART0
[    2.762703] console [ttyO0] enabled
[    2.772351] omap_uart 48022000.serial: no wakeirq for uart0
[    2.779345] 48022000.serial: ttyO1 at MMIO 0x48022000 (irq = 89, base_baud = 3000000) is a OMAP UART1
[    2.802351] omap_rng 48310000.rng: OMAP Random Number Generator ver. 20
[    2.902160] brd: module loaded
[    2.959863] loop: module loaded
[    2.982522] mtdoops: mtd device (mtddev=name/number) must be supplied
[    3.001176] usbcore: registered new interface driver cdc_acm
[    3.007171] cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
[    3.018096] usbcore: registered new interface driver usblp
[    3.025074] usbcore: registered new interface driver cdc_wdm
[    3.032741] usbcore: registered new interface driver usbtmc
[    3.041076] usbcore: registered new interface driver usb-storage
[    3.048892] usbcore: registered new interface driver ums_eneub6250
[    3.056454] usbcore: registered new interface driver ums-jumpshot
[    3.064410] usbcore: registered new interface driver ums-realtek
[    3.072132] usbcore: registered new interface driver ums-sddr55
[    3.079928] usbcore: registered new interface driver ums-usbat
[    3.088719] usbcore: registered new interface driver usbserial
[    3.096050] usbcore: registered new interface driver usblcd
[    3.103554] usbcore: registered new interface driver ldusb
[    3.111019] usbcore: registered new interface driver usbled
[    3.118263] usbcore: registered new interface driver usbsevseg
[    3.130432] mousedev: PS/2 mouse device common for all mice
[    3.151401] omap_rtc 44e3e000.rtc: rtc core: registered 44e3e000.rtc as rtc0
[    3.163582] i2c /dev entries driver
[    3.168693] Driver for 1-wire Dallas network protocol.
[    3.187324] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec
[    3.202594] sdhci: Secure Digital Host Controller Interface driver
[    3.209487] sdhci: Copyright(c) Pierre Ossman
[    3.273230] mmc0: mmc_rescan_try_freq: trying to init card at 400000 Hz
[    3.379482] mmc0: new high speed SDHC card at address aaaa
[    3.393431] mmcblk0: mmc0:aaaa SS04G 3.69 GiB 
[    3.414826]  mmcblk0: p1 p2
[    3.420975] sdhci-pltfm: SDHCI platform and OF driver helper
[    3.443814] mmc1: mmc_rescan_try_freq: trying to init card at 400000 Hz
[    3.452806] usbcore: registered new interface driver usbhid
[    3.459024] usbhid: USB HID core driver
[    3.467297] platform 44d00000.wkup_m3: Driver wkup_m3 requests probe deferral
[    3.494260] oprofile: using arm/armv7
[    3.505773] PM: bootloader does not support rtc-only!
[    3.511507] ThumbEE CPU extension supported.
[    3.516136] Registering SWP/SWPB emulation handler
[    3.521311] SmartReflex Class3 initialized
[    3.538383] wlan-en-regulator: disabling
[    3.542621] lis3_reg: disabling
[    3.545951] vbat: disabling
[    3.549050] regulator-dummy: disabling
[    3.556406] omap-gpmc 50000000.gpmc: GPMC revision 6.0
[    3.562499] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000
[    3.574675] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda
[    3.581886] nand: Micron MT29F2G08ABAEAWP
[    3.586130] nand: 256MiB, SLC, page size: 2048, OOB size: 64
[    3.592366] nand: error: CONFIG_MTD_NAND_OMAP_BCH not enabled
[    3.598685] omap2-nand: probe of omap2-nand.0 failed with error -22
[    3.624647] tps65910 0-002d: No interrupt support, no core IRQ
[    3.641675] tps65910 0-002d: Error in configuring external control EN1
[    3.648972] tps65910 0-002d: Failed to initialise ext control config
[    3.660527] vrtc: failed to enable
[    3.671425] tps65910 0-002d: failed to register tps65910-pmic regulator
[    3.678846] tps65910-pmic: probe of tps65910-pmic failed with error -121
[    3.690900] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz
[    3.718351] omap_i2c 4802a000.i2c: bus 1 rev0.11 at 100 kHz
[    3.727438]  remoteproc0: wkup_m3 is available
[    3.732612]  remoteproc0: Note: remoteproc is still under development and considered experimental.
[    3.742303]  remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed.
[    3.755753]  remoteproc0: Direct firmware load failed with error -2
[    3.762571]  remoteproc0: Falling back to user helper
[    3.784467] input: volume_keys.9 as /devices/volume_keys.9/input/input0
[    3.800751] omap_rtc 44e3e000.rtc: setting system clock to 2000-01-01 00:00:00 UTC (946684800)
[    3.810155] sr_init: No PMIC hook to init smartreflex
[    3.818432] sr_init: platform driver register failed for SR
[    3.900805] EXT4-fs (mmcblk0p2): INFO: recovery required on readonly filesystem
[    3.908739] EXT4-fs (mmcblk0p2): write access will be enabled during recovery
[   10.478386] EXT4-fs (mmcblk0p2): recovery complete
[   10.504719] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
[   10.513800] VFS: Mounted root (ext4 filesystem) readonly on device 179:2.
[   10.523601] devtmpfs: mounted
[   10.528669] Freeing unused kernel memory: 364K (c068e000 - c06e9000)
INIT: version 2.88 booting
Error opening /dev/fb0: No such file or directory
Starting udev
udevd[668]: error getting socket: Address family not supported by protocol

error initializing udev control socketudevd[668]: error initializing udev control socket
[   12.349319] random: nonblocking pool is initialized
error getting socket: Address family not supported by protocol
udevadm[675]: error getting socket: Address family not supported by protocol

error getting socket: Address family not supported by protocol
udevadm[681]: error getting socket: Address family not supported by protocol

[   13.233081] EXT4-fs (mmcblk0p2): re-mounted. Opts: data=ordered
Starting Bootlog daemon: bootlogd: cannot allocate pseudo tty: No such file or directory
bootlogd.
Populating dev cache
ALSA: Restoring mixer settings...
/usr/sbin/alsactl: load_state:1729: No soundcards found...
Wed Feb 11 14:32:00 UTC 2015
INIT: Entering runlevel: 5
Configuring network interfaces... ifconfig: socket: Address family not supported by protocol
ifconfig: socket: Address family not supported by protocol
done.
Starting system message bus: Failed to start message bus: Failed to open socket: Address family not supported by protocol
dbus.
Starting telnet daemon.
Starting rpcbind daemon...rpcbind: cannot create socket for local
rpcbind: cannot create socket for udp
rpcbind: cannot create socket for tcp
rpcbind: cannot create socket for udp6
rpcbind: cannot create socket for tcp6
done.
creating NFS state directory: done
starting statd: done
Starting syslogd/klogd: done
Starting thttpd.
Stopping Bootlog daemon: bootlogd.

 _____                    _____           _         _   
|  _  |___ ___ ___ ___   |  _  |___ ___  |_|___ ___| |_ 
|     |  _| .'| . | . |  |   __|  _| . | | | -_|  _|  _|
|__|__|_| |__,|_  |___|  |__|  |_| |___|_| |___|___|_|  
              |___|                    |___|            

Arago Project http://arago-project.org am335x-evm /dev/ttyO0

Arago 2015.02 am335x-evm /dev/ttyO0

am335x-evm login: root


root@am335x-evm:~# 
root@am335x-evm:~# 
root@am335x-evm:~# 
root@am335x-evm:~# 
root@am335x-evm:~# 
root@am335x-evm:~# 
root@am335x-evm:~# lsusb
unable to initialize libusb: -99
root@am335x-evm:~# 

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "TI AM335x EVM";
	compatible = "ti,am335x-evm", "ti,am33xx";

	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	vbat: fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};

	lis3_reg: fixedregulator@1 {
		compatible = "regulator-fixed";
		regulator-name = "lis3_reg";
		regulator-boot-on;
	};

	wlan_en_reg: fixedregulator@2 {
		compatible = "regulator-fixed";
		regulator-name = "wlan-en-regulator";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;

		/* WLAN_EN GPIO for this board - Bank1, pin16 */
		gpio = <&gpio1 16 0>;

		/* WLAN card specific delay */
		startup-delay-us = <70000>;
		enable-active-high;
	};

	matrix_keypad: matrix_keypad@0 {
		compatible = "gpio-matrix-keypad";
		debounce-delay-ms = <5>;
		col-scan-delay-us = <2>;

		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&matrix_keypad_default>;
		pinctrl-1 = <&matrix_keypad_sleep>;

		row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH		/* Bank1, pin25 */
			     &gpio1 26 GPIO_ACTIVE_HIGH		/* Bank1, pin26 */
			     &gpio1 27 GPIO_ACTIVE_HIGH>;	/* Bank1, pin27 */

		col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH		/* Bank1, pin21 */
			     &gpio1 22 GPIO_ACTIVE_HIGH>;	/* Bank1, pin22 */

		linux,keymap = <0x0000008b	/* MENU */
				0x0100009e	/* BACK */
				0x02000069	/* LEFT */
				0x0001006a	/* RIGHT */
				0x0101001c	/* ENTER */
				0x0201006c>;	/* DOWN */
	};

	gpio_keys: volume_keys@0 {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;
		autorepeat;

		switch@9 {
			label = "volume-up";
			linux,code = <115>;
			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
			gpio-key,wakeup;
		};

		switch@10 {
			label = "volume-down";
			linux,code = <114>;
			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
			gpio-key,wakeup;
		};
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&ecap0 0 50000 0>;
		brightness-levels = <0 51 53 56 62 75 101 152 255>;
		default-brightness-level = <8>;
	};

	panel {
		compatible = "ti,tilcdc,panel";
		status = "okay";
		panel-info {
			ac-bias           = <255>;
			ac-bias-intrpt    = <0>;
			dma-burst-sz      = <16>;
			bpp               = <32>;
			fdd               = <0x80>;
			sync-edge         = <0>;
			sync-ctrl         = <1>;
			raster-order      = <0>;
			fifo-th           = <0>;
		};

		display-timings {
			800x480p62 {
				clock-frequency = <30000000>;
				hactive = <800>;
				vactive = <480>;
				hfront-porch = <39>;
				hback-porch = <39>;
				hsync-len = <47>;
				vback-porch = <29>;
				vfront-porch = <13>;
				vsync-len = <2>;
				hsync-active = <1>;
				vsync-active = <1>;
			};
		};
	};

	kim {
		compatible = "kim";
		nshutdown_gpio = <117>; /* Bank3, pin21 */
		dev_name = "/dev/ttyO1";
		flow_cntrl = <1>;
		baud_rate = <3000000>;
	};

	btwilink {
		compatible = "btwilink";
	};

	sound {
		compatible = "ti,da830-evm-audio";
		ti,model = "AM335x-EVM";
		ti,audio-codec = <&tlv320aic3106>;
		ti,mcasp-controller = <&mcasp1>;
		ti,codec-clock-rate = <12000000>;
		ti,audio-routing =
			"Headphone Jack",       "HPLOUT",
			"Headphone Jack",       "HPROUT",
			"LINE1L",               "Line In",
			"LINE1R",               "Line In";
	};
};

&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&volume_keys_s0 &clkout2_pin>;

	matrix_keypad_default: matrix_keypad_default {
		pinctrl-single,pins = <
			0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a5.gpio1_21 */
			0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a6.gpio1_22 */
			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a9.gpio1_25 */
			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a10.gpio1_26 */
			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a11.gpio1_27 */
		>;
	};

	matrix_keypad_sleep: matrix_keypad_sleep {
		pinctrl-single,pins = <
			0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a5.gpio1_21 */
			0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a6.gpio1_22 */
		>;
	};

	volume_keys_s0: volume_keys_s0 {
		pinctrl-single,pins = <
			0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* spi0_sclk.gpio0_2 */
			0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* spi0_d0.gpio0_3 */
		>;
	};

	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			0x188 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
			0x18c (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
		>;
	};

	i2c1_pins_default: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			0x158 (PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_d1.i2c1_sda */
			0x15c (PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_cs0.i2c1_scl */
		>;
	};

	i2c1_pins_sleep: i2c1_pins_sleep {
		pinctrl-single,pins = <
			0x158 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* spi0_d1.i2c1_sda */
			0x15c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* spi0_cs0.i2c1_scl */
		>;
	};

	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
		>;
	};

	uart1_pins_default: pinmux_uart1_pins_default {
		pinctrl-single,pins = <
			0x178 (PIN_INPUT | MUX_MODE0)			/* uart1_ctsn.uart1_ctsn */
			0x17C (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_rtsn.uart1_rtsn */
			0x180 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_rxd.uart1_rxd */
			0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) 	/* uart1_txd.uart1_txd */
		>;
	};

	uart1_pins_sleep: pinmux_uart1_pins_sleep {
		pinctrl-single,pins = <
			0x178 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x17C (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x180 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x184 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	clkout2_pin: pinmux_clkout2_pin {
		pinctrl-single,pins = <
			0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */
		>;
	};

	nandflash_pins_default: nandflash_pins_default {
		pinctrl-single,pins = <
			0x0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
			0x4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
			0x8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
			0xc (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
			0x10 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
			0x14 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
			0x18 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
			0x1c (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
			0x70 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
			0x74 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_wpn.gpio0_30 */
			0x7c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_csn0.gpmc_csn0  */
			0x90 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_advn_ale.gpmc_advn_ale */
			0x94 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_oen_ren.gpmc_oen_ren */
			0x98 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_wen.gpmc_wen */
			0x9c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_be0n_cle.gpmc_be0n_cle */
		>;
	};

	nandflash_pins_sleep: nandflash_pins_sleep {
		pinctrl-single,pins = <
			0x0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0xc (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x10 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x14 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x18 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x1c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x74 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x7c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x98 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	ecap0_pins_default: backlight_pins {
		pinctrl-single,pins = <
			0x164 0x0	/* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
		>;
	};

	ecap0_pins_sleep: ecap0_pins_sleep {
		pinctrl-single,pins = <
			0x164  (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
			0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
			0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
			0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
			0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
			0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
			0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rgmii1_rclk */
			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
			/* Slave 1 reset value */
			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	mmc1_pins_default: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat3.mmc0_dat3 */
			0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat2.mmc0_dat2 */
			0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat1.mmc0_dat1 */
			0x0FC (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat0.mmc0_dat0 */
			0x100 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_clk.mmc0_clk */
			0x104 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_cmd.mmc0_cmd */
			0x1A0 (PIN_INPUT| MUX_MODE4)    /* mcasp0_aclkr.gpio3_18 */
			0x160 (PIN_INPUT_PULLUP | MUX_MODE5)           /* spi0_cs1.gpio0_6 */
		>;
	};

	mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
		pinctrl-single,pins = <
			0x0F0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x0F4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x0F8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x0FC (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x1A0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	/* wl12xx/wl18xx card on mmc3 */
	mmc3_pins_default: pinmux_mmc3_pins_default {
		pinctrl-single,pins = <
			0x44 (PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a1.mmc2_dat0 */
			0x48 (PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a2.mmc2_dat1 */
			0x4C (PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a3.mmc2_dat2 */
			0x78 (PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_ben1.mmc2_dat3 */
			0x88 (PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_csn3.mmc2_cmd */
			0x8C (PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_clk.mmc2_clk */
		>;
	};

	mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
		pinctrl-single,pins = <
			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a1.mmc2_dat0 */
			0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a2.mmc2_dat1 */
			0x4C (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a3.mmc2_dat2 */
			0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ben1.mmc2_da */
			0x88 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_csn3.mmc2_cmd */
			0x8C (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_clk.mmc2_clk */
		>;
	};

	/* wl12xx/wl18xx card enable/irq GPIOs. */
	wlan_pins_default: pinmux_wlan_pins_default {
		pinctrl-single,pins = <
			0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a0.gpio1_16 */
			0x19C (PIN_INPUT | MUX_MODE7)		/* mcasp0_ahclkr.gpio3_17 */
			0x1AC (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* mcasp0_ahclkx.gpio3_21 */
		>;
	};

	wlan_pins_sleep: pinmux_wlan_pins_sleep {
		pinctrl-single,pins = <
			0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a0.gpio1_16 */
			0x19C (PIN_INPUT | MUX_MODE7)		/* mcasp0_ahclkr.gpio3_17 */
			0x1AC (PIN_OUTPUT_PULLUP | MUX_MODE7)	/* mcasp0_ahclkx.gpio3_21 */
		>;
	};

	lcd_pins_default: lcd_pins_default {
		pinctrl-single,pins = <
			0x20 0x01	/* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */
			0x24 0x01	/* gpmc_ad9.lcd_data17, OUTPUT | MODE1 */
			0x28 0x01	/* gpmc_ad10.lcd_data18, OUTPUT | MODE1 */
			0x2c 0x01	/* gpmc_ad11.lcd_data19, OUTPUT | MODE1 */
			0x30 0x01	/* gpmc_ad12.lcd_data20, OUTPUT | MODE1 */
			0x34 0x01	/* gpmc_ad13.lcd_data21, OUTPUT | MODE1 */
			0x38 0x01	/* gpmc_ad14.lcd_data22, OUTPUT | MODE1 */
			0x3c 0x01	/* gpmc_ad15.lcd_data23, OUTPUT | MODE1 */
			0xa0 0x00	/* lcd_data0.lcd_data0, OUTPUT | MODE0 */
			0xa4 0x00	/* lcd_data1.lcd_data1, OUTPUT | MODE0 */
			0xa8 0x00	/* lcd_data2.lcd_data2, OUTPUT | MODE0 */
			0xac 0x00	/* lcd_data3.lcd_data3, OUTPUT | MODE0 */
			0xb0 0x00	/* lcd_data4.lcd_data4, OUTPUT | MODE0 */
			0xb4 0x00	/* lcd_data5.lcd_data5, OUTPUT | MODE0 */
			0xb8 0x00	/* lcd_data6.lcd_data6, OUTPUT | MODE0 */
			0xbc 0x00	/* lcd_data7.lcd_data7, OUTPUT | MODE0 */
			0xc0 0x00	/* lcd_data8.lcd_data8, OUTPUT | MODE0 */
			0xc4 0x00	/* lcd_data9.lcd_data9, OUTPUT | MODE0 */
			0xc8 0x00	/* lcd_data10.lcd_data10, OUTPUT | MODE0 */
			0xcc 0x00	/* lcd_data11.lcd_data11, OUTPUT | MODE0 */
			0xd0 0x00	/* lcd_data12.lcd_data12, OUTPUT | MODE0 */
			0xd4 0x00	/* lcd_data13.lcd_data13, OUTPUT | MODE0 */
			0xd8 0x00	/* lcd_data14.lcd_data14, OUTPUT | MODE0 */
			0xdc 0x00	/* lcd_data15.lcd_data15, OUTPUT | MODE0 */
			0xe0 0x00	/* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
			0xe4 0x00	/* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */
			0xe8 0x00	/* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */
			0xec 0x00	/* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */
		>;
	};

	lcd_pins_sleep: lcd_pins_sleep {
		pinctrl-single,pins = <
			0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad8.lcd_data16 */
			0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad9.lcd_data17 */
			0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad10.lcd_data18 */
			0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad11.lcd_data19 */
			0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad12.lcd_data20 */
			0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad13.lcd_data21 */
			0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad14.lcd_data22 */
			0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad15.lcd_data23 */
			0xa0 (PULL_DISABLE | MUX_MODE7)		/* lcd_data0.lcd_data0 */
			0xa4 (PULL_DISABLE | MUX_MODE7)		/* lcd_data1.lcd_data1 */
			0xa8 (PULL_DISABLE | MUX_MODE7)		/* lcd_data2.lcd_data2 */
			0xac (PULL_DISABLE | MUX_MODE7)		/* lcd_data3.lcd_data3 */
			0xb0 (PULL_DISABLE | MUX_MODE7)		/* lcd_data4.lcd_data4 */
			0xb4 (PULL_DISABLE | MUX_MODE7)		/* lcd_data5.lcd_data5 */
			0xb8 (PULL_DISABLE | MUX_MODE7)		/* lcd_data6.lcd_data6 */
			0xbc (PULL_DISABLE | MUX_MODE7)		/* lcd_data7.lcd_data7 */
			0xc0 (PULL_DISABLE | MUX_MODE7)		/* lcd_data8.lcd_data8 */
			0xc4 (PULL_DISABLE | MUX_MODE7)		/* lcd_data9.lcd_data9 */
			0xc8 (PULL_DISABLE | MUX_MODE7)		/* lcd_data10.lcd_data10 */
			0xcc (PULL_DISABLE | MUX_MODE7)		/* lcd_data11.lcd_data11 */
			0xd0 (PULL_DISABLE | MUX_MODE7)		/* lcd_data12.lcd_data12 */
			0xd4 (PULL_DISABLE | MUX_MODE7)		/* lcd_data13.lcd_data13 */
			0xd8 (PULL_DISABLE | MUX_MODE7)		/* lcd_data14.lcd_data14 */
			0xdc (PULL_DISABLE | MUX_MODE7)		/* lcd_data15.lcd_data15 */
			0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
			0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_hsync.lcd_hsync */
			0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_pclk.lcd_pclk */
			0xec (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_ac_bias_en.lcd_ac_bias_en */
		>;
	};

	am335x_evm_audio_pins: am335x_evm_audio_pins {
		pinctrl-single,pins = <
			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rx_dv.mcasp1_aclkx */
			0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_txd3.mcasp1_fsx */
			0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
		>;
	};

	am335x_evm_audio_pins_sleep: am335x_evm_audio_pins_sleep {
		pinctrl-single,pins = <
			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mii1_rx_dv.mcasp1_aclkx */
			0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mii1_txd3.mcasp1_fsx */
			0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mii1_col.mcasp1_axr2 */
			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_ref_clk.mcasp1_axr3 */
		>;
	};

	dcan1_pins_default: dcan1_pins_default {
		pinctrl-single,pins = <
			0x168 (PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
			0x16c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
		>;
	};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;

	status = "okay";
};

&uart1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&uart1_pins_default>;
	pinctrl-1 = <&uart1_pins_sleep>;


	status = "okay";
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

	tps: tps@2d {
		reg = <0x2d>;
	};
};

&usb {
	status = "okay";

	control@44e10620 {
		status = "okay";
	};

	usb-phy@47401300 {
		status = "okay";
	};

	usb-phy@47401b00 {
		status = "okay";
	};

	usb@47401000 {
		status = "okay";
	};

	usb@47401800 {
		status = "okay";
		dr_mode = "host";
	};

	dma-controller@47402000  {
		status = "okay";
	};
};

&i2c1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c1_pins_default>;
	pinctrl-1 = <&i2c1_pins_sleep>;

	status = "okay";
	clock-frequency = <100000>;

	lis331dlh: lis331dlh@18 {
		compatible = "st,lis331dlh", "st,lis3lv02d";
		reg = <0x18>;
		Vdd-supply = <&lis3_reg>;
		Vdd_IO-supply = <&lis3_reg>;

		st,click-single-x;
		st,click-single-y;
		st,click-single-z;
		st,click-thresh-x = <10>;
		st,click-thresh-y = <10>;
		st,click-thresh-z = <10>;
		st,irq1-click;
		st,irq2-click;
		st,wakeup-x-lo;
		st,wakeup-x-hi;
		st,wakeup-y-lo;
		st,wakeup-y-hi;
		st,wakeup-z-lo;
		st,wakeup-z-hi;
		st,min-limit-x = <120>;
		st,min-limit-y = <120>;
		st,min-limit-z = <140>;
		st,max-limit-x = <550>;
		st,max-limit-y = <550>;
		st,max-limit-z = <750>;
	};

	tsl2550: tsl2550@39 {
		compatible = "taos,tsl2550";
		reg = <0x39>;
	};

	tmp275: tmp275@48 {
		compatible = "ti,tmp275";
		reg = <0x48>;
	};

	tlv320aic3106: tlv320aic3106@1b {
		compatible = "ti,tlv320aic3106";
		reg = <0x1b>;
		status = "okay";

		/* Regulators */
		AVDD-supply = <&vaux2_reg>;
		IOVDD-supply = <&vaux2_reg>;
		DRVDD-supply = <&vaux2_reg>;
		DVDD-supply = <&vbat>;
	};
};

&lcdc {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&lcd_pins_default>;
	pinctrl-1 = <&lcd_pins_sleep>;
};

&elm {
	status = "okay";
};

&epwmss0 {
	status = "okay";

	ecap0: ecap@48300100 {
		status = "okay";
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&ecap0_pins_default>;
		pinctrl-1 = <&ecap0_pins_sleep>;
	};
};

&gpmc {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&nandflash_pins_default>;
	pinctrl-1 = <&nandflash_pins_sleep>;
	ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
	nand@0,0 {
		reg = <0 0 0>; /* CS0, offset 0 */
		ti,nand-ecc-opt = "bch8";
		ti,elm-id = <&elm>;
		nand-bus-width = <8>;
		gpmc,device-width = <1>;
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-on-ns = <0>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wait-on-read = "true";
		gpmc,wait-on-write = "true";
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wait-monitoring-ns = <0>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		/* MTD partition table */
		/* All SPL-* partitions are sized to minimal length
		 * which can be independently programmable. For
		 * NAND flash this is equal to size of erase-block */
		#address-cells = <1>;
		#size-cells = <1>;
		partition@0 {
			label = "NAND.SPL";
			reg = <0x00000000 0x000020000>;
		};
		partition@1 {
			label = "NAND.SPL.backup1";
			reg = <0x00020000 0x00020000>;
		};
		partition@2 {
			label = "NAND.SPL.backup2";
			reg = <0x00040000 0x00020000>;
		};
		partition@3 {
			label = "NAND.SPL.backup3";
			reg = <0x00060000 0x00020000>;
		};
		partition@4 {
			label = "NAND.u-boot-spl-os";
			reg = <0x00080000 0x00040000>;
		};
		partition@5 {
			label = "NAND.u-boot";
			reg = <0x000C0000 0x00100000>;
		};
		partition@6 {
			label = "NAND.u-boot-env";
			reg = <0x001C0000 0x00020000>;
		};
		partition@7 {
			label = "NAND.u-boot-env.backup1";
			reg = <0x001E0000 0x00020000>;
		};
		partition@8 {
			label = "NAND.kernel";
			reg = <0x00200000 0x00800000>;
		};
		partition@9 {
			label = "NAND.file-system";
			reg = <0x00A00000 0x0F600000>;
		};
	};
};

#include "tps65910.dtsi"

&mcasp1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&am335x_evm_audio_pins>;
	pinctrl-1 = <&am335x_evm_audio_pins_sleep>;

	status = "okay";

	op-mode = <0>;          /* MCASP_IIS_MODE */
	tdm-slots = <2>;
	/* 4 serializers */
	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
		0 0 1 2
	>;
	tx-num-evt = <32>;
	rx-num-evt = <32>;
};

&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	regulators {
		vrtc_reg: regulator@0 {
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			/* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1378000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};
	};
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <0>;
	phy-mode = "rgmii-txid";
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <1>;
	phy-mode = "rgmii-txid";
};

&tscadc {
	status = "okay";
	tsc {
		ti,wires = <4>;
		ti,x-plate-resistance = <200>;
		ti,coordinate-readouts = <5>;
		ti,wire-config = <0x00 0x11 0x22 0x33>;
	};

	adc {
		ti,adc-channels = <4 5 6 7>;
	};
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&vmmc_reg>;
	bus-width = <4>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mmc1_pins_default>;
	pinctrl-1 = <&mmc1_pins_sleep>;
	cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
	wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
	vmmc-supply = <&vmmcsd_fixed>;        /* my_naveen */
};

&mmc3 {
	/* these are on the crossbar and are outlined in the
	   xbar-event-map element */
	dmas = <&edma 12
		&edma 13>;
	dma-names = "tx", "rx";
	status = "okay";
	vmmc-supply = <&wlan_en_reg>;
	bus-width = <4>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mmc3_pins_default &wlan_pins_default>;
	pinctrl-1 = <&mmc3_pins_sleep &wlan_pins_sleep>;
	ti,non-removable;
	ti,needs-special-hs-handling;
	cap-power-off-card;
	keep-power-in-suspend;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@0 {
		compatible = "ti,wlcore";
		reg = <2>;
		interrupt-parent = <&gpio3>;
		interrupts = <17 IRQ_TYPE_NONE>;
	};
};

&edma {
	ti,edma-xbar-event-map = /bits/ 16 <1 12
					    2 13>;
};


&sham {
	status = "okay";
};

&aes {
	status = "okay";
};

&wkup_m3 {
	ti,scale-data-fw = "am335x-evm-scale-data.bin";
};

&dcan1 {
	status = "disabled";	/* Enable only if Profile 1 is selected */
	pinctrl-names = "default";
	pinctrl-0 = <&dcan1_pins_default>;
};

/*
 * Device Tree Source for AM33XX SoC
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/am33xx.h>

#include "skeleton.dtsi"

/ {
	compatible = "ti,am33xx";
	interrupt-parent = <&intc>;

	aliases {
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
		serial4 = &uart4;
		serial5 = &uart5;
		d_can0 = &dcan0;
		d_can1 = &dcan1;
		usb0 = &usb0;
		usb1 = &usb1;
		phy0 = &usb0_phy;
		phy1 = &usb1_phy;
		ethernet0 = &cpsw_emac0;
		ethernet1 = &cpsw_emac1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "arm,cortex-a8";
			device_type = "cpu";
			reg = <0>;

			voltage-tolerance = <2>; /* 2 percentage */

			clocks = <&dpll_mpu_ck>;
			clock-names = "cpu";

			clock-latency = <300000>; /* From omap-cpufreq driver */
		};
	};

	pmu {
		compatible = "arm,cortex-a8-pmu";
		interrupts = <3>;
	};

	/*
	 * The soc node represents the soc top level view. It is uses for IPs
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
		};
	};

	am33xx_control_module: control_module@4a002000 {
		compatible = "syscon";
		reg = <0x44e10000 0x7fc>;
	};

	am33xx_pinmux: pinmux@44e10800 {
		compatible = "pinctrl-single";
		reg = <0x44e10800 0x0238>;
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-single,register-width = <32>;
		pinctrl-single,function-mask = <0x7f>;
	};

	/*
	 * XXX: Use a flat representation of the AM33XX interconnect.
	 * The real AM33XX interconnect network is quite complex.Since
	 * that will not bring real advantage to represent that in DT
	 * for the moment, just use a fake OCP bus entry to represent
	 * the whole bus hierarchy.
	 */
	ocp {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		ti,hwmods = "l3_main";

		prcm: prcm@44e00000 {
			compatible = "ti,am3-prcm";
			reg = <0x44e00000 0x4000>;

			prcm_clocks: clocks {
				#address-cells = <1>;
				#size-cells = <0>;
			};

			prcm_clockdomains: clockdomains {
			};
		};

		scrm: scrm@44e10000 {
			compatible = "ti,am3-scrm";
			reg = <0x44e10000 0x2000>;

			scrm_clocks: clocks {
				#address-cells = <1>;
				#size-cells = <0>;
			};

			scrm_clockdomains: clockdomains {
			};
		};

		intc: interrupt-controller@48200000 {
			compatible = "ti,omap2-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			ti,intc-size = <128>;
			reg = <0x48200000 0x1000>;
		};

		edma: edma@49000000 {
			compatible = "ti,edma3";
			ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
			reg =	<0x49000000 0x10000>,
				<0x44e10f90 0x40>;
			interrupts = <12 13 14>;
			#dma-cells = <1>;
		};

		gpio0: gpio@44e07000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio1";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x44e07000 0x1000>;
			interrupts = <96>;
		};

		gpio1: gpio@4804c000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio2";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x4804c000 0x1000>;
			interrupts = <98>;
		};

		gpio2: gpio@481ac000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio3";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x481ac000 0x1000>;
			interrupts = <32>;
		};

		gpio3: gpio@481ae000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio4";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x481ae000 0x1000>;
			interrupts = <62>;
		};

		uart0: serial@44e09000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart1";
			clock-frequency = <48000000>;
			reg = <0x44e09000 0x2000>;
			interrupts = <72>;
			status = "disabled";
			dmas = <&edma 26>, <&edma 27>;
			dma-names = "tx", "rx";
		};

		uart1: serial@48022000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart2";
			clock-frequency = <48000000>;
			reg = <0x48022000 0x2000>;
			interrupts = <73>;
			status = "disabled";
			dmas = <&edma 28>, <&edma 29>;
			dma-names = "tx", "rx";
		};

		uart2: serial@48024000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart3";
			clock-frequency = <48000000>;
			reg = <0x48024000 0x2000>;
			interrupts = <74>;
			status = "disabled";
			dmas = <&edma 30>, <&edma 31>;
			dma-names = "tx", "rx";
		};

		uart3: serial@481a6000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart4";
			clock-frequency = <48000000>;
			reg = <0x481a6000 0x2000>;
			interrupts = <44>;
			status = "disabled";
		};

		uart4: serial@481a8000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart5";
			clock-frequency = <48000000>;
			reg = <0x481a8000 0x2000>;
			interrupts = <45>;
			status = "disabled";
		};

		uart5: serial@481aa000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart6";
			clock-frequency = <48000000>;
			reg = <0x481aa000 0x2000>;
			interrupts = <46>;
			status = "disabled";
		};

		i2c0: i2c@44e0b000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c1";
			reg = <0x44e0b000 0x1000>;
			interrupts = <70>;
			status = "disabled";
		};

		i2c1: i2c@4802a000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c2";
			reg = <0x4802a000 0x1000>;
			interrupts = <71>;
			status = "disabled";
		};

		i2c2: i2c@4819c000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c3";
			reg = <0x4819c000 0x1000>;
			interrupts = <30>;
			status = "okay";
		};

		mmc1: mmc@48060000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc1";
			ti,dual-volt;
			ti,needs-special-reset;
			ti,needs-special-hs-handling;
			dmas = <&edma 24
				&edma 25>;
			dma-names = "tx", "rx";
			interrupts = <64>;
			interrupt-parent = <&intc>;
			reg = <0x48060000 0x1000>;
			status = "okay";
		};


	   	 vmmcsd_fixed: fixedregulator@0 {		/*my _naveen */
       			compatible = "regulator-fixed";		/*my_naveen  */		
        		regulator-name = "vmmcsd_fixed";	/*my_naveen  */
        		regulator-min-microvolt = <3300000>;	/*my_naveen */
        		regulator-max-microvolt = <3300000>;	/*my_naveen*/
    		}; 

		mmc2: mmc@481d8000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc2";
			ti,needs-special-reset;
			dmas = <&edma 2
				&edma 3>;
			dma-names = "tx", "rx";
			interrupts = <28>;
			interrupt-parent = <&intc>;
			reg = <0x481d8000 0x1000>;
			status = "disabled";
		};

		mmc3: mmc@47810000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc3";
			ti,needs-special-reset;
			interrupts = <29>;
			interrupt-parent = <&intc>;
			reg = <0x47810000 0x1000>;
			status = "disabled";
		};

		hwspinlock: spinlock@480ca000 {
			compatible = "ti,omap4-hwspinlock";
			reg = <0x480ca000 0x1000>;
			ti,hwmods = "spinlock";
			#hwlock-cells = <1>;
		};

		wdt2: wdt@44e35000 {
			compatible = "ti,omap3-wdt";
			ti,hwmods = "wd_timer2";
			reg = <0x44e35000 0x1000>;
			interrupts = <91>;
		};

		dcan0: can@481cc000 {
			compatible = "ti,am3352-d_can";
			ti,hwmods = "d_can0";
			clocks = <&dcan0_fck>;
			clock-names = "fck";
			reg = <0x481cc000 0x2000>;
			syscon-raminit = <&am33xx_control_module 0x644 0>;
			interrupts = <52>;
			status = "disabled";
		};

		dcan1: can@481d0000 {
			compatible = "ti,am3352-d_can";
			ti,hwmods = "d_can1";
			clocks = <&dcan1_fck>;
			clock-names = "fck";
			reg = <0x481d0000 0x2000>;
			syscon-raminit = <&am33xx_control_module 0x644 1>;
			interrupts = <55>;
			status = "disabled";
		};

		mailbox: mailbox@480C8000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x480C8000 0x200>;
			interrupts = <77>;
			ti,hwmods = "mailbox";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <8>;
			mbox_wkupm3: wkup_m3 {
				ti,mbox-send-noirq;
				ti,mbox-tx = <0 0 0>;
				ti,mbox-rx = <0 0 3>;
			};
			mbox_pru0: mbox_pru0 {
				ti,mbox-tx = <2 0 0>;
				ti,mbox-rx = <3 0 0>;
			};
			mbox_pru1: mbox_pru1 {
				ti,mbox-tx = <4 0 0>;
				ti,mbox-rx = <5 0 0>;
			};
		};

		timer1: timer@44e31000 {
			compatible = "ti,am335x-timer-1ms";
			reg = <0x44e31000 0x400>;
			interrupts = <67>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
		};

		timer2: timer@48040000 {
			compatible = "ti,am335x-timer";
			reg = <0x48040000 0x400>;
			interrupts = <68>;
			ti,hwmods = "timer2";
		};

		timer3: timer@48042000 {
			compatible = "ti,am335x-timer";
			reg = <0x48042000 0x400>;
			interrupts = <69>;
			ti,hwmods = "timer3";
		};

		timer4: timer@48044000 {
			compatible = "ti,am335x-timer";
			reg = <0x48044000 0x400>;
			interrupts = <92>;
			ti,hwmods = "timer4";
			ti,timer-pwm;
		};

		timer5: timer@48046000 {
			compatible = "ti,am335x-timer";
			reg = <0x48046000 0x400>;
			interrupts = <93>;
			ti,hwmods = "timer5";
			ti,timer-pwm;
		};

		timer6: timer@48048000 {
			compatible = "ti,am335x-timer";
			reg = <0x48048000 0x400>;
			interrupts = <94>;
			ti,hwmods = "timer6";
			ti,timer-pwm;
		};

		timer7: timer@4804a000 {
			compatible = "ti,am335x-timer";
			reg = <0x4804a000 0x400>;
			interrupts = <95>;
			ti,hwmods = "timer7";
			ti,timer-pwm;
		};

		rtc@44e3e000 {
			compatible = "ti,am3352-rtc";
			reg = <0x44e3e000 0x1000>;
			interrupts = <75
				      76>;
			ti,hwmods = "rtc";
		};

		spi0: spi@48030000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x48030000 0x400>;
			interrupts = <65>;
			ti,spi-num-cs = <2>;
			ti,hwmods = "spi0";
			dmas = <&edma 16
				&edma 17
				&edma 18
				&edma 19>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
			status = "disabled";
		};

		spi1: spi@481a0000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x481a0000 0x400>;
			interrupts = <125>;
			ti,spi-num-cs = <2>;
			ti,hwmods = "spi1";
			dmas = <&edma 42
				&edma 43
				&edma 44
				&edma 45>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
			status = "disabled";
		};

		usb: usb@47400000 {
			compatible = "ti,am33xx-usb";
			reg = <0x47400000 0x1000>;
			ranges;
			#address-cells = <1>;
			#size-cells = <1>;
			ti,hwmods = "usb_otg_hs";
			status = "disabled";

			usb_ctrl_mod: control@44e10620 {
				compatible = "ti,am335x-usb-ctrl-module";
				reg = <0x44e10620 0x10
					0x44e10648 0x4>;
				reg-names = "phy_ctrl", "wakeup";
				status = "disabled";
			};

			usb0_phy: usb-phy@47401300 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x47401300 0x100>;
				reg-names = "phy";
				status = "disabled";
				ti,ctrl_mod = <&usb_ctrl_mod>;
			};

			usb0: usb@47401000 {
				compatible = "ti,musb-am33xx";
				status = "disabled";
				reg = <0x47401400 0x400
					0x47401000 0x200>;
				reg-names = "mc", "control";

				interrupts = <18>;
				interrupt-names = "mc";
				dr_mode = "otg";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;
				phys = <&usb0_phy>;

				dmas = <&cppi41dma  0 0 &cppi41dma  1 0
					&cppi41dma  2 0 &cppi41dma  3 0
					&cppi41dma  4 0 &cppi41dma  5 0
					&cppi41dma  6 0 &cppi41dma  7 0
					&cppi41dma  8 0 &cppi41dma  9 0
					&cppi41dma 10 0 &cppi41dma 11 0
					&cppi41dma 12 0 &cppi41dma 13 0
					&cppi41dma 14 0 &cppi41dma  0 1
					&cppi41dma  1 1 &cppi41dma  2 1
					&cppi41dma  3 1 &cppi41dma  4 1
					&cppi41dma  5 1 &cppi41dma  6 1
					&cppi41dma  7 1 &cppi41dma  8 1
					&cppi41dma  9 1 &cppi41dma 10 1
					&cppi41dma 11 1 &cppi41dma 12 1
					&cppi41dma 13 1 &cppi41dma 14 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			usb1_phy: usb-phy@47401b00 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x47401b00 0x100>;
				reg-names = "phy";
				status = "disabled";
				ti,ctrl_mod = <&usb_ctrl_mod>;
			};

			usb1: usb@47401800 {
				compatible = "ti,musb-am33xx";
				status = "disabled";
				reg = <0x47401c00 0x400
					0x47401800 0x200>;
				reg-names = "mc", "control";
				interrupts = <19>;
				interrupt-names = "mc";
				dr_mode = "otg";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;
				phys = <&usb1_phy>;

				dmas = <&cppi41dma 15 0 &cppi41dma 16 0
					&cppi41dma 17 0 &cppi41dma 18 0
					&cppi41dma 19 0 &cppi41dma 20 0
					&cppi41dma 21 0 &cppi41dma 22 0
					&cppi41dma 23 0 &cppi41dma 24 0
					&cppi41dma 25 0 &cppi41dma 26 0
					&cppi41dma 27 0 &cppi41dma 28 0
					&cppi41dma 29 0 &cppi41dma 15 1
					&cppi41dma 16 1 &cppi41dma 17 1
					&cppi41dma 18 1 &cppi41dma 19 1
					&cppi41dma 20 1 &cppi41dma 21 1
					&cppi41dma 22 1 &cppi41dma 23 1
					&cppi41dma 24 1 &cppi41dma 25 1
					&cppi41dma 26 1 &cppi41dma 27 1
					&cppi41dma 28 1 &cppi41dma 29 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			cppi41dma: dma-controller@47402000 {
				compatible = "ti,am3359-cppi41";
				reg =  <0x47400000 0x1000
					0x47402000 0x1000
					0x47403000 0x1000
					0x47404000 0x4000>;
				reg-names = "glue", "controller", "scheduler", "queuemgr";
				interrupts = <17>;
				interrupt-names = "glue";
				#dma-cells = <2>;
				#dma-channels = <30>;
				#dma-requests = <256>;
				status = "disabled";
			};
		};

		epwmss0: epwmss@48300000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48300000 0x10>;
			ti,hwmods = "epwmss0";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
			ranges = <0x48300100 0x48300100 0x80   /* ECAP */
				  0x48300180 0x48300180 0x80   /* EQEP */
				  0x48300200 0x48300200 0x80>; /* EHRPWM */

			ecap0: ecap@48300100 {
				compatible = "ti,am33xx-ecap";
				#pwm-cells = <3>;
				reg = <0x48300100 0x80>;
				ti,hwmods = "ecap0";
				status = "disabled";
			};

			ehrpwm0: ehrpwm@48300200 {
				compatible = "ti,am33xx-ehrpwm";
				#pwm-cells = <3>;
				reg = <0x48300200 0x80>;
				ti,hwmods = "ehrpwm0";
				status = "disabled";
			};
		};

		epwmss1: epwmss@48302000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48302000 0x10>;
			ti,hwmods = "epwmss1";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
			ranges = <0x48302100 0x48302100 0x80   /* ECAP */
				  0x48302180 0x48302180 0x80   /* EQEP */
				  0x48302200 0x48302200 0x80>; /* EHRPWM */

			ecap1: ecap@48302100 {
				compatible = "ti,am33xx-ecap";
				#pwm-cells = <3>;
				reg = <0x48302100 0x80>;
				ti,hwmods = "ecap1";
				status = "disabled";
			};

			ehrpwm1: ehrpwm@48302200 {
				compatible = "ti,am33xx-ehrpwm";
				#pwm-cells = <3>;
				reg = <0x48302200 0x80>;
				ti,hwmods = "ehrpwm1";
				status = "disabled";
			};
		};

		epwmss2: epwmss@48304000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48304000 0x10>;
			ti,hwmods = "epwmss2";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
			ranges = <0x48304100 0x48304100 0x80   /* ECAP */
				  0x48304180 0x48304180 0x80   /* EQEP */
				  0x48304200 0x48304200 0x80>; /* EHRPWM */

			ecap2: ecap@48304100 {
				compatible = "ti,am33xx-ecap";
				#pwm-cells = <3>;
				reg = <0x48304100 0x80>;
				ti,hwmods = "ecap2";
				status = "disabled";
			};

			ehrpwm2: ehrpwm@48304200 {
				compatible = "ti,am33xx-ehrpwm";
				#pwm-cells = <3>;
				reg = <0x48304200 0x80>;
				ti,hwmods = "ehrpwm2";
				status = "disabled";
			};
		};

		mac: ethernet@4a100000 {
			compatible = "ti,cpsw";
			ti,hwmods = "cpgmac0";
			clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
			clock-names = "fck", "cpts";
			cpdma_channels = <8>;
			ale_entries = <1024>;
			bd_ram_size = <0x2000>;
			no_bd_ram = <0>;
			rx_descs = <64>;
			mac_control = <0x20>;
			slaves = <2>;
			active_slave = <0>;
			cpts_clock_mult = <0x80000000>;
			cpts_clock_shift = <29>;
			reg = <0x4a100000 0x800
			       0x4a101200 0x100>;
			#address-cells = <1>;
			#size-cells = <1>;
			interrupt-parent = <&intc>;
			/*
			 * c0_rx_thresh_pend
			 * c0_rx_pend
			 * c0_tx_pend
			 * c0_misc_pend
			 */
			interrupts = <40 41 42 43>;
			ranges;

			davinci_mdio: mdio@4a101000 {
				compatible = "ti,davinci_mdio";
				#address-cells = <1>;
				#size-cells = <0>;
				ti,hwmods = "davinci_mdio";
				bus_freq = <1000000>;
				reg = <0x4a101000 0x100>;
			};

			cpsw_emac0: slave@4a100200 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			cpsw_emac1: slave@4a100300 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			phy_sel: cpsw-phy-sel@44e10650 {
				compatible = "ti,am3352-cpsw-phy-sel";
				reg= <0x44e10650 0x4>;
				reg-names = "gmii-sel";
			};
		};

		ocmcram: ocmcram@40300000 {
			compatible = "ti,am3352-ocmcram";
			reg = <0x40300000 0x10000>;
			ti,hwmods = "ocmcram";
		};

		wkup_m3: wkup_m3@44d00000 {
			compatible = "ti,am3353-wkup-m3";
			reg = <0x44d00000 0x4000
			       0x44d80000 0x2000
			       0x44e11324 0x0024>;
			reg-names = "m3_umem", "m3_dmem", "ipc_regs";
			interrupts = <78>;
			ti,hwmods = "wkup_m3";
			ti,no-reset-on-init;
			mboxes = <&mailbox &mbox_wkupm3>;
		};

		pruss: pruss@4a300000 {
			compatible = "ti,am335x-pruss";
			ti,hwmods = "pruss";
			reg = <0x4a300000 0x2000>,
			      <0x4a302000 0x2000>,
			      <0x4a310000 0x3000>,
			      <0x4a320000 0x2000>,
			      <0x4a326000 0x2000>;
			reg-names = "dram0", "dram1", "shrdram2", "intc", "cfg";
			interrupts = <20 21 22 23 24 25 26 27>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			pru0: pru@4a334000 {
				compatible = "ti,pru-rproc";
				reg = <0x4a334000 0x2000>,
				      <0x4a322000 0x400>,
				      <0x4a322400 0x100>;
				reg-names = "iram", "control", "debug";
				mboxes = <&mailbox &mbox_pru0>;
			};

			pru1: pru@4a338000 {
				compatible = "ti,pru-rproc";
				reg = <0x4a338000 0x2000>,
				      <0x4a324000 0x400>,
				      <0x4a324400 0x100>;
				reg-names = "iram", "control", "debug";
				mboxes = <&mailbox &mbox_pru1>;
			};
		};

		elm: elm@48080000 {
			compatible = "ti,am3352-elm";
			reg = <0x48080000 0x2000>;
			interrupts = <4>;
			ti,hwmods = "elm";
			status = "disabled";
		};

		lcdc: lcdc@4830e000 {
			compatible = "ti,am33xx-tilcdc";
			reg = <0x4830e000 0x1000>;
			interrupt-parent = <&intc>;
			interrupts = <36>;
			ti,hwmods = "lcdc";
			status = "disabled";
		};

		tscadc: tscadc@44e0d000 {
			compatible = "ti,am3359-tscadc";
			reg = <0x44e0d000 0x1000>;
			interrupt-parent = <&intc>;
			interrupts = <16>;
			ti,hwmods = "adc_tsc";
			status = "disabled";

			tsc {
				compatible = "ti,am3359-tsc";
			};
			am335x_adc: adc {
				#io-channel-cells = <1>;
				compatible = "ti,am3359-adc";
			};
		};

		gpmc: gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			ti,no-idle-on-init;
			reg = <0x50000000 0x2000>;
			interrupts = <100>;
			gpmc,num-cs = <7>;
			gpmc,num-waitpins = <2>;
			#address-cells = <2>;
			#size-cells = <1>;
			status = "disabled";
		};

		sham: sham@53100000 {
			compatible = "ti,omap4-sham";
			ti,hwmods = "sham";
			reg = <0x53100000 0x200>;
			interrupts = <109>;
			dmas = <&edma 36>;
			dma-names = "rx";
		};

		aes: aes@53500000 {
			compatible = "ti,omap4-aes";
			ti,hwmods = "aes";
			reg = <0x53500000 0xa0>;
			interrupts = <103>;
			dmas = <&edma 6>,
			       <&edma 5>;
			dma-names = "tx", "rx";
		};

		mcasp0: mcasp@48038000 {
			compatible = "ti,am33xx-mcasp-audio";
			ti,hwmods = "mcasp0";
			reg = <0x48038000 0x2000>,
			      <0x46000000 0x400000>;
			reg-names = "mpu", "dat";
			interrupts = <80>, <81>;
			interrupts-names = "tx", "rx";
			status = "disabled";
			dmas = <&edma 8>,
				<&edma 9>;
			dma-names = "tx", "rx";
		};

		mcasp1: mcasp@4803C000 {
			compatible = "ti,am33xx-mcasp-audio";
			ti,hwmods = "mcasp1";
			reg = <0x4803C000 0x2000>,
			      <0x46400000 0x400000>;
			reg-names = "mpu", "dat";
			interrupts = <82>, <83>;
			interrupts-names = "tx", "rx";
			status = "disabled";
			dmas = <&edma 10>,
				<&edma 11>;
			dma-names = "tx", "rx";
		};

		rng: rng@48310000 {
			compatible = "ti,omap4-rng";
			ti,hwmods = "rng";
			reg = <0x48310000 0x2000>;
			interrupts = <111>;
		};

		sgx@0x56000000 {
			compatible = "ti,sgx";
			ti,hwmods = "gfx";
			reg = <0x56000000 0x1000000>;
			interrupts = <37>;
		};
	};
};

/include/ "am33xx-clocks.dtsi"