Hi,
I have something I suppose to be a compiler issue.
We are using TI ARM CGT v5.2.2 on a DM814x.
The code is like this:
void foo()
{
// ...
unsigned short int values[] = { 1, 0 };
bar(values);
// ...
}
What the compiler generates to initialize the "values" array looks like this:
ldr r12 [pc, #0x860]
ldr r12, [r12]
str r12, [sp, #0x18]
At PC+0x860 is the address to the location where the constants { 1, 0 } are located in the binary.
Unfortunately this address is not 4-byte aligned, probably because it's an array of 16 bit values.
Hence the processor throws a data fault exception when executing ldr r12, [r12] because of address misalignment.
In my opinion the compiler should not assume the data to be 4-byte-aligned since it is an array of 16 bit values. So I wonder if this is a compiler bug.
Am I right?
Is there any workaround without manipulating the source code? (I don't want to scan our code which has been developed for years using TI's DSPs for more situations like this ...)
Thanks.
BR, Lars
