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AM335x GPMC WR and RDCYCLETIME config values for nand device access.

In the WRCYCLE and RDCYCLE as RDACCES/WRACCES  fields I'm confused about what sum of times I must choose.

Because of NAND access have more than one cycles for data read/write, another number of cycles for addressing write access and commands need two cycles at star and finish addressing. I don't know:

  • CYCLE times reffers only one data WR/RD cycle or the sum of data (data wr/rd, address or commands) cycles? my datasheet gives me wr and rd cycle times but it reffers only one output and input word cycle.
  • Then how to calculate wr/rd access times?
  • What do you usually choose as the end of operation cycle (both write and read)?

I know RD access time must be set after eofftime and CYCLE times could be the fixed the same of CSOFFTIME.

Any suggestion will be helpful.

Thanks in advance.