Testing Socket communication for K2L EVM Board with PC

Hi Kushal,

Please refer below wiki to run NDK Client example on EVM. Also we recommend you to use latest Processor SDK released for development. Please find the download and migration guide link below my signature.

Thank you.

Dear Kushal,
Your code is able to stop at main() after loading the code ?
You would get the prints in CCS console window.

I didn't use K2L EVM and I think, like K2E, you should run the script (setupPhy) before loading the NDK example on K2L.
''Scripts -> DSP CLOCK Estimation -> setupPhy''

processors.wiki.ti.com/.../Running_NDK_examples_for_Keystone_devices

Dear Kushal,
It seems to be known issue.
This issue has been fixed in our latest Processor SDK release and you are using MCSDK.
www.ti.com/.../PROCESSOR-SDK-K2L
software-dl.ti.com/.../index_FDS.html


Otherwise, you can comment out the "void CSL_SgmiiDefSerdesSetup()" entire function and use the following function and then rebuild the platform project.

K2L platform project:
C:\ti\pdk_keystone2_3_01_04_07\packages\ti\platform\evmk2l\platform_lib

Import the above project and rebuild with mentioned change.

C:\ti\pdk_keystone2_3_01_04_07\packages\ti\platform\evmk2l\platform_lib\src\evmc66x_phy.c

void CSL_SgmiiDefSerdesSetup()
{
uint32_t i;
CSL_SERDES_RESULT csl_retval;
CSL_SERDES_LANE_ENABLE_STATUS lane_retval = CSL_SERDES_LANE_ENABLE_NO_ERR;
CSL_SERDES_STATUS pllstat;
uint32_t serdes_mux_ethernet_sel;
int numPort1 = (NUM_MAC_PORTS > 2)?2:NUM_MAC_PORTS;
int numPort2 = (NUM_MAC_PORTS > 2)?NUM_MAC_PORTS - 2:0;


/* Check CSISC2_3_MUXSEL bit */
if (CSL_FEXTR(*(volatile uint32_t *)(CSL_BOOT_CFG_REGS + 0x20), 28, 28) == 0)
serdes_mux_ethernet_sel = 1;

/* SB CMU and COMLANE and Lane Setup */
csl_retval = CSL_EthernetSerdesInit(CSL_CSISC2_2_SERDES_CFG_REGS,
CSL_SERDES_REF_CLOCK_156p25M,
CSL_SERDES_LINK_RATE_1p25G); /* SGMII Lane 0 and Lane 1 */

if (serdes_mux_ethernet_sel && numPort2)
{
csl_retval |= CSL_EthernetSerdesInit(CSL_CSISC2_3_SERDES_CFG_REGS,
CSL_SERDES_REF_CLOCK_156p25M,
CSL_SERDES_LINK_RATE_1p25G); /* SGMII Lane 2 and Lane 3 */
}

if (csl_retval != 0)
{
//System_printf ("Invalid Serdes Init Params\n");
}

//SB Lane Enable
for(i=0; i < numPort1; i++)
{
lane_retval |= CSL_EthernetSerdesLaneEnable(CSL_CSISC2_2_SERDES_CFG_REGS,
i,
CSL_SERDES_LOOPBACK_DISABLED,
CSL_SERDES_LANE_QUARTER_RATE); /* SGMII Lane 0 and Lane 1 */
}

if (serdes_mux_ethernet_sel && numPort2)
{
for(i=0; i < numPort1; i++)
{
lane_retval |= CSL_EthernetSerdesLaneEnable(CSL_CSISC2_3_SERDES_CFG_REGS,
i,
CSL_SERDES_LOOPBACK_DISABLED,
CSL_SERDES_LANE_QUARTER_RATE); /* SGMII Lane 2 and Lane 3 */
}
}

if (lane_retval != 0)
{
//System_printf ("Invalid Serdes Lane Rate\n");
}

/* SB PLL Enable */
CSL_EthernetSerdesPllEnable(CSL_CSISC2_2_SERDES_CFG_REGS); /* SGMII Lane 0 and Lane 1 */

/* Check CSISC2_3_MUXSEL bit */
if (serdes_mux_ethernet_sel)
CSL_EthernetSerdesPllEnable(CSL_CSISC2_3_SERDES_CFG_REGS); /* SGMII Lane 2 and Lane 3 */

/* SB PLL Status Poll */
do
{
pllstat = CSL_EthernetSerdesGetStatus(CSL_CSISC2_2_SERDES_CFG_REGS, numPort1); /* SGMII Lane 0 and Lane 1 */
}while(pllstat == CSL_SERDES_STATUS_PLL_NOT_LOCKED);

/* Check CSISC2_3_MUXSEL bit */
if (serdes_mux_ethernet_sel)
{
do
{
pllstat = CSL_EthernetSerdesGetMuxStatus(CSL_CSISC2_3_SERDES_CFG_REGS, numPort2); /* SGMII Lane 2 and Lane 3 */
}while(pllstat == CSL_SERDES_STATUS_PLL_NOT_LOCKED);
}

}


Please let me know the status.

I would like you to use the latest processor SDK package.
C:\ti\pdk_k2l_4_0_1\packages\ti\platform\evmk2l\platform_lib