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PCIe in K2K

Atanu Guchhait
Prodigy 90 points

Dear all,

In K2K SoC, we are planning to use PCIe interface to directly write quite large amount of data (~12KB) to DDR3 memory location and generate an interrupt to the DSP C66x core to use the data. As PCIe in one inbound transaction can only write 256 bytes of data, I am wondering to write 12KB of data in DDR3, does PCIe generates multiple interrupts and DSP SW has to take care? Or there is any better alternative to do so where DSP core gets only one interrupt after completion of 12KB write to DDR3 memory?

Please suggest and provide reference to related literature.

Regards,

Atanu 

  • 0
    TI__Guru** 116100 points
    Dear Atanu,
    Will check with our PCIe experts on this.
  • 0 in reply to Titusrathinaraj Stalin
    TI__Guru* 95265 points

    Atanu,

    Inbound transfer means the external device initiates the transactions to write to or read from the local device. The PCIe module has a master port to transfer the data to or from the device memory; no CPU or EDMA is needed for inbound transfer in the local device. We can take advantage of the 256-byte payload size of inbound transfer as long as the external device also has 256 bytes (or more) of outbound payload size.

    When you write 12K data from an external device, it is landed on local DSP by multiple blocks. However,there is no PCIE interrupt generated towards DSP CPU when each block finished. DSP doesn't know data are there. After writing 12KB data, the external device needs to generate a legacy A/B/C/D or MSI interrupt to DSP.

    Regards, Eric

  • 0 in reply to lding
    Prodigy 90 points
    Eric,

    Thank you very much, we will implement a sample program and test this.

    Regards,
    Atanu