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OMAP L138 Memory Map usage without DSPLink

Other Parts Discussed in Thread: DA8XX

Hi,

We're utilizing the OMAP L138 with the C6748 DSP and we've been trying to figure out how to get the kernel to execute out of a specific memory location in the DDR2.  We are NOT using DSPLink, thus it is definitely not using a .tci file to configure this.  The default kernel is setup to execute at the beginning of DDR2 memory.

 

Thanks.

 

  • Jay Shu said:
    We're utilizing the OMAP L138 with the C6748 DSP and we've been trying to figure out how to get the kernel to execute out of a specific memory location in the DDR2.

    Check out this http://processors.wiki.ti.com/index.php/HOWTO_Change_the_Linux_Kernel_Start_Address wiki article, it should help you in moving the kernel start address forward, allowing you to give the beginning of the DDR to the DSP.

    In general you probably want to use DSP Link though, since you will need some sort of DSP executable (.out) parser to get the DSP to come up, and normally it is not a problem to have that DSP executable placed in upper DDR. So you could say I don't really understand why this is a requirement, which is fine, I just want to be sure you are going down the path to the optimal solution.

  • Bernie, thanks.

    We will look through that wiki.  We cannot use DSPLink due to the fact that we do give out the .out for our application.  This is due to size ,IP concerns, and legacy software.

  • Bernie that wiki looks like it applies only to a specific kernel.  We are using 2.6.33-rc4 now.  Clearly, the new menuconfig does not have what is stated in the wiki of:

    1. SDRAM offset for the Kernel
    2. ZRELADDR location for the Kernel
    3. PARAMS_PHYS location for the Kernel
    4. INITRD_PHYS location

    You have an idea where it is now because it is definitely not located there.

  • My suspicion is that the kernel start address is not adjustable from menuconfig in the 2.6.33 kernel, even with the 2.6.18 kernel the wiki page was made for, the menuconfig options were not always there it seems. This being said, I suspect you have to modify the kernel manually to achieve this, as described in section 2.2 of the wiki article.

    I don't have a 2.6.33 install handy, but I took a look at a 2.6.32 install I had in place and it looks like the files mentioned on the wiki are all still there, though moved around a bit. Note that I am not certain that there are not other files or differences to the modifications you have to make, I have never moved the kernel start address.

    Instead of arch/arm/mach-davinci/board-evm.c, I believe you will want arch/arm/mach-davinci/board-da850-evm.c, there is a .boot_params value near the bottom of the C file. 

    The arch/arm/mach-davinci/Makefile.boot appears to still be there, changes there look to be the same.

    The include/asm-arm/arch-davinci/memory.h file seems to have been moved to arch/arm/mach-davinci/include/mach/memory.h, though I suspect you will want to modify DA8XX_DDR_BASE instead of DAVINCI_DDR_BASE if you are working with an L138.

  • Bernie, followed what you did.  Please take a look at these "patches" on the DaVinci PSP SDK 3.20.00.12 and also from the arago u-boot-davinci git repos.  The problem after the changes to the u-boot is u boot doesn't come up. I can see that UBL is fine but clearly something is wrong with uboot now.  The changes are pretty simple.  We're trying to move the kernel to DDR memory location 0xC6000000.

    From U-BOOT

    =========================

    In include/configs/da850evm.h
    @@ -48,18 +48,18 @@
     /*
      * Memory Info
      */
     #define CONFIG_SYS_MALLOC_LEN    (0x10000 + 1*1024*1024) /* malloc() len */
     #define CONFIG_SYS_GBL_DATA_SIZE    128 /* reserved for initial data */
    -#define PHYS_SDRAM_1        DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
    +#define PHYS_SDRAM_1        0xC6000000 /* DDR Start */
     #define PHYS_SDRAM_1_SIZE    (128 << 20) /* SDRAM size 128MB */
     
     /* memtest start addr */
    -#define CONFIG_SYS_MEMTEST_START    (PHYS_SDRAM_1 + 0x2000000)
    +#define CONFIG_SYS_MEMTEST_START 0xC0000000  /*(PHYS_SDRAM_1 + 0x2000000) */
     
     /* memtest will be run on 16MB */
    -#define CONFIG_SYS_MEMTEST_END     (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
    +#define CONFIG_SYS_MEMTEST_END     0xC4000000 /*(PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) */
     
     #define CONFIG_NR_DRAM_BANKS    1 /* we have 1 bank of DRAM */
     #define CONFIG_STACKSIZE    (256*1024) /* regular stack */
     
     /*

    In board/davinci/da8xxevm/config.mk
    @@ -38,6 +38,8 @@
     #
     # we load ourself to C108 '0000
     
     
     #Provide at least 16MB spacing between us and the Linux Kernel image
    -TEXT_BASE = 0xC1080000
    +#TEXT_BASE = 0xC1080000
    +TEXT_BASE = 0xC7080000
    +

    ====================================

    From the kernel src

    In kernel/linux-03.20.00.12/arch/arm/mach-davinci/Makefile.boot
    @@ -1,12 +1,12 @@
     ifeq ($(CONFIG_ARCH_DAVINCI_DA8XX),y)
     ifeq ($(CONFIG_ARCH_DAVINCI_DMx),y)
     $(error Cannot enable DaVinci and DA8XX platforms concurrently)
     else
    -   zreladdr-y    := 0xc0008000
    -params_phys-y    := 0xc0000100
    -initrd_phys-y    := 0xc0800000
    +   zreladdr-y    := 0xc6008000
    +params_phys-y    := 0xc6000100
    +initrd_phys-y    := 0xc6800000
     endif
     else
        zreladdr-y    := 0x80008000
     params_phys-y    := 0x80000100
     initrd_phys-y    := 0x80800000


    In kernel/linux-03.20.00.12/arch/arm/mach-davinci/include/mach/memory.h
    @@ -19,11 +19,11 @@
     
     /**************************************************************************
      * Definitions
      **************************************************************************/
     #define DAVINCI_DDR_BASE    0x80000000
    -#define DA8XX_DDR_BASE        0xc0000000
    +#define DA8XX_DDR_BASE        0xc6000000  /* was 0xc0000000 */
     
     #if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx)
     #error Cannot enable DaVinci and DA8XX platforms concurrently
     #elif defined(CONFIG_ARCH_DAVINCI_DA8XX)
     #define PHYS_OFFSET DA8XX_DDR_BASE

     

  • Bernie, the final thing was the flash writer.  It has a hardcoded entry point.  That had to get moved for U-Boot. Now everything works