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66AK2L06 using and managing DFE

Other Parts Discussed in Thread: 66AK2L06, RFSDK, TCI6630K2L, SYSBIOS, DAC38J84, ADC12J4000, ADC32RF80

Hi

I'm studying and searching about 66AK2l06 DSP, I studied "tidub94.pdf" and I have some questions about it:

In that document the demo software was an interface between user and ARM processors, if the user need more requirements and controls like he wants pass the data through DDUC, Match Filter and finally set the data in the memory(MSMC or DDR3....), what should he do? 

Question 1:

How we can pass the data through DDUC, Match Filter and finally set the data in the memory(MSMC or DDR3....)?

Question 2:

Is it possible to manage all that mentioned requirements from CCS?

Question 3:

If I want to use multi thread programming on ARM processors, I should write my program on Linux on SOC or at CCS in PC side? 

Best Regards

  • Hi

    Please, answer me I'm waiting for you.

    Regards

  • Are you running Linux on ARM cores and BIOS on DSP cores?
  • Dear Raja

    i have not any system including 66AK2L06,just i need to gather some information first and then buy it,if it realizes my need.

    you asked me :

    "Are you running Linux on ARM cores and BIOS on DSP cores?"

    I want to use Linux on ARM cores and BIOS on DSP cores ,but please tell me if any alternative is existed.
    Best Regards

  • Hello trying to answer your 3 questions in the previous post.

    Q1) the DDUC is part of the DFE, there are several documents to review.   Data sheet for 66AK2L06, the DFE User Guide, the RFSDK User guide ( you have to request access under MySecureSoftware for the RFSDK.    

       The DFE User Guide - under the technical document sections of TCI6630K2L or 66AK2L06, there is a list of peripheral user guides.

             66aK2L06 device datasheet - 66ak2l06.pdf

    The DDUC in this example, is operated with interpolation or decimation of 1.   For most matched filter applications this would need an oversampled data at least 2x.  This can be done iwth the DDUC-pfir controls, or planning of the sample rate / DDUC transfer rate.

    The data flow is normally JESD interface -> Rx / Fdbk block => Rx DDUC -> BBRx -> AID Bus -> IQN2 -> (data transport) -> memory for receive applications.

    The data from for Tx cycles is memory -> (data transport) -> IQN2 -> AIDBus -> BBTx -> Tx DDUC -> SumChain -> CFR -> CDFR -> Tx -> JESD interface.

    In test mode the JESD Tx interface can loopback to JESD Rx.   

    A DFE configuration is designed for a specific RFSDK use case.   Within the DFE configuration, once the signal processing is understood, the PFIR filter, currently can be replaced by patching the TGTCFG file coefficients.  This is not a standard RFSDK feature currently.

    Q2) The RFSDK utilizes the Arm for a software interpreter structure.   Either the RFSDK webpage (RFSDK 2.05 or later) or shell scripts are used with the RFSDK command set to perform operations.   

    The infrastructure software memory <-> IQN2 <-> DFE <-> JESD Data converter is called playback RT within the RFSDK.   There is a version of this software called playback FULL that can be used from a CCS project.   

    The RFSDK command set does not normally run from the DSP, in the PDK there is a DFE  and IQN2 LLD, so you could build that interface if desired.

    Q3) I think this relates to Open MP programming.   I don't know of a customer using Open MP with RFSDK at this time.  The RFSDK is a Linux daemon to monitor and control IQN2, DFE, Serdes, AFE750x (if used).    If other data converters are desired, the user must write a custom driver similar to the AFE750x driver.

    Regards,

    Joe Quintal

  • Hello, All, 

    What if my customer does not want to use Linux/Sysbios? RFSDK created "driver" for Linux. Reverse engineering shows that some information has been written to some registers, no chance to create custom "driver", no chance to use at barebone system.

    Any chance to get detailed DFE description with registers, etc to avoid  RFSDK application?

    Best regards,

    Dmitry

     

  • Hello,

    All of the current customers for 66Ak2L06 utilize the RFSDK to manage the JESD204 serdes, DFE, IQN, and data transport.  The framework for stream

    sample rates and stream format are used to determine the serdes rate, and DFE configuration.  The DFE configuration is prebuilt and is selected by the customer

    for a specific set of JESD204 parameters, stream rates, and baseband rates.  The IQN side has specific channel (antenna container) parameters which are used to set IQN and the DMA infrastructure to memory.

        JESD204B serdes - the MCSDK has the DFE list of provided serdes configurations

       DFE stream rates, which also select the 20 * JESD transfer rates, are discussed in the RFSDK User Guide, list of configurations for DFE.

       DFE configurations are prebuilt, there are specific standard stream rates, used with specific TI JESD data converters: AFE750x, ADC12J4000, DAC38J84,

       ADC32RF80 are examples.   Under the RFSDK you can also research the adjacent market design, design 4 is a general starting point.

       IQN configuration is based on the DFE Baseband rate, complex sample rate, number of carriers are needed.  This is used to preprogram the IQN and PktDMA

       structure

    If you want any other interface than the standard RFSDK there are two possibilities:

         contact the TI Business manager, to discuss it

         engage with the third party developers for customization

    We currently do not have customers that bypass the RFSDK framework.  

    Regards,

    Joe Quintal