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Behavior of AM335x GPMC_BEn1 during XIP(MUX2) non-muxed 8 bit boot

Guru 15520 points

Hi,

I have a question about AM335x GPMC_BEn1 during XIP non-muxed(MUX2) 8-bit boot mode.

At my customer board, NOR Flash are connected to GPMC_CSn0 for XIP boot.
And other memory are connected to GPMC_CSn2.

As written in TRM(spruh73m) page.4930 Table 26-9, I understood that
GPMC_CSn2 and GPMC_BEn1 terminals are driven in MUX2 mode with the BE1N signal.

In 8-bit memory access I guess GPMC_BEn1 won't be used,
so we are thinking that this caution can be ignored as far as 8bit boot XIP boot mode are used
if GPMC_CSn2  will be driven to High during XIP 8-bit boot mode.

Does GPMC_CSn2 will be driven to High  during XIP non-muxed(MUX2) 8-bit boot?
Or is it unknown state and need to take care the GPMC_CSn2 during boot?

best regards,
g.f.