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C6748 bootloader only copies a partial content of NAND image to IRAM

Other Parts Discussed in Thread: OMAP-L138, OMAPL138

Hello TIers,

I have a problem that C6748 ROM bootloader doesn't copy whole image from NAND Flash to IRAM.  In other words, only a partial content is copied to IRAM.

FYI, I'm evaluating this on C6748 LCDK.

I made an AIS image by AISgen for D800K008 and burned the image by OMAP-L138_FlashAndBootUtils.  After some trials, I traced the ROM bootloader behavior and finally found that _only_ a partial image of the AIS image was copied to IRAM.

Exactly speaking, the AIS image has the following command (or data) block in it.

(snip)
0002340          010d0003        58535901        11800000        0000ffa0
0002360          27773677        86779577        053c35c4        01be54f6
0002400          02461347        06000041        043f82d5        e2600300
0002420          e8e6272e        30010f13        208002a5        270012a9
0002440          06267756        268016a8        233c62f4        e2200202
0002460          dc45ac05        90010a10        80382a78        81000fd8
0002500          80001fda        0c6e2c6e        00000000        e4200c00
0002520          d1fb2121        c4983624        301bf010        a1980fd8
(snip)

(Before the Section Load Command (0x58535901), I also see some PLL, DRR and PSC initialization sequences.)

When I traced the ROM bootloader by CCS emulator, it looks copying only the first 784 bytes (or 0x310) of the block even though the block has 0xffa0 bytes length as shown above.

I guess that the ROM bootloader iterates a process that copies some bytes from NAND flash into a scratch memory and again copying that to IRAM, but after copying the first 784 bytes, it doesn't copy the remaining bytes anymore.  I'm afraid I have given up to trace the ROM bootloader because I don't have the bootloader source code. :)

Does anybody know why it happens?  (I also suspect that the AIS image wasn't correctly burned into NAND flash, but I'm afraid I don't have any tool to investigate NAND flash contents.)

BTW, a very curious point is, the boot successfully runs WHEN I tried to load the NAND flash image into _DDR_ memory instead of IRAM.  The AIS images should be identical except for loading memory address (0x11800000 instead of 0xc0000000).  Secondly, it neither work if I specified local IRAM address (0x00800000).  Thirdly, I confirmed that IRAM boot goes well when load image is very small.  I suspect that the boot image was too large even though it should fit in 256KB IRAM of C6748.

If you need the actual AIS image file, I can send it to you.

My environment is as following.

  • C6748 LCDK (should be the latest revision)
  • AISgen_d800k008_Install_v1.13
  • OMAP-L138_FlashAndBootUtils_2_40.tar.gz

Used commands are

  • sfh_OMAP-L138.exe -targetType C6748_LCDK -flashType NAND -p COM3 -erase
  • sfh_OMAP-L138.exe -targetType C6748_LCDK -flashType NAND -p COM3 -flash_noubl ais_image.bin

The AISgen configuration file is also attached.

ais_config_mine_spi0.cfg

Any suggestion would be highly appreciated.

Thanks and Best Regards,
Atsushi Yokoyama

  • Hi Atsushi,

    Would you please try the pre-built AIS image and flash it into the NAND of C6748 LCDK.

    The pre-built images are located at "~\OMAP-L138_FlashAndBootUtils_2_40\OMAP-L138_FlashAndBootUtils_2_40\OMAP-L138\GNU\ubl"

    If pre-built works for you, then it will be easy to narrow down where the problem is...
  • Hello Shankari,

    Thank you for your prompt reply.

    I tried OMAP-L138_FlashAndBootUtils_2_40/OMAP-L138/GNU/ubl/ubl_C6748_LCDK_NAND.bin and found that the image (longer than 784 bytes) was successfully loaded and also running (looping at a BNOP instruction) as attached screenshots.

        

    If you allow, I can send my own AIS image to you.

    Regards,

    Atsushi Yokoyama

  • Shankari,

    May I ask your additional help?  As I mentioned, the prebuilt image successfully worked...

    Regards,
    Atsushi Yokoyama

  • Hi Atsushi Yokoyama,

    I have tried to boot the following GPIO code on C6748 LCDK board.

    C:\ti\C6748_StarterWare_1_20_04_01\build\c674x\cgt_ccs\c6748\lcdkC6748\gpio

    Able to boot the GPIO blinking code using internal shared RAM on C6748 LCDK board. I'm attaching the ais code.

    C:\ti\OMAP-L138_FlashAndBootUtils_2.40\OMAP-L138\GNU>sfh_OMAP-L138.exe -targetType C6748_LCDK -flashType NAND -flash_noubl gpioLed.ais -p COM47

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/gpioLed.ais

    Can you please try the attached binary on your C6748 LCDK board ?

    In my opinion, you don't want to use the bootloader if you are using C6748 DSP alone.

    It might needed if you have OMAPL138.

    OMAPL138 is ARM+DSP device, where ARM will be master and comes out of reset first then DSP.

    So, you need bootloader to wakeup the DSP core to run the DSP code on OMAPL138.

    Also, if you want to run the ARM code alone on OMAPL138 then you no need to use the bootloader and run the code directly.

    If you have C6748 (DSP core alone) then you no need to use the bootloader (UBL or whatever),  you can flash and boot the DSP code directly on C6748 DSP LCDK board.

    This is the linker command file used.

    // ============================================================================

    // Linker Command File for Linking c674 DSP Programs

    //

    // These linker options are for command line linking only. For IDE linking,

    // you should set your linker options in Project Properties.

    //         -c                    Link Using C Conventions

    //        -stack     0x1000        Software Stack Size

    //        -heap    0x1000        Heap Area Size

    // ===========================================================================

    -stack 0x1000

    -heap 0x1000

    // ============================================================================

    //                         Specify the System Memory Map

    // ============================================================================

    MEMORY

    {

       L1P:    o = 0x11E00000        l = 0x00008000

       L1D:    o = 0x11F00000        l = 0x00008000

       L2:     o = 0x11800000        l = 0x00040000

       DDR2:   o = 0xC0000000        l = 0x08000000

    SHRAM:  o = 0x80000000        l = 0x00020000  /* 128kB Shared RAM */

    }

    // ============================================================================

    //                 Specify the Sections Allocation into Memory

    // ============================================================================

    SECTIONS

    {

       .cinit        >        SHRAM               // Initialization Tables

       .pinit        >        SHRAM               // Constructor Tables

       .init_array   >        SHRAM               //

       .binit        >        SHRAM               // Boot Tables

       .const        >        SHRAM               // Constant Data

       .switch       >        SHRAM               // Jump Tables

       .text         >        SHRAM               // Executable Code

       .text:_c_int00: align=1024 > SHRAM         // Entrypoint

       GROUP (NEARDP_DATA)                       // group near data

       {

          .neardata

          .rodata

          .bss                                   // note: removed fill = 0

       }             >        SHRAM

       .far: fill = 0x0, load > SHRAM             // Far Global & Static Variables

       .fardata      >        SHRAM               // Far RW Data

       .stack        >        SHRAM               // Software System Stack

       .sysmem       >        SHRAM               // Dynamic Memory Allocation Area

       .cio          >        SHRAM               // C I/O Buffer

       .vecs         >        SHRAM               // Interrupt Vectors

    }

  • Hello Shankari,

    Thank you very much for your suggestion in detail.

    First, I'm afraid my customer decided to use C6748 and they won't be happy with OMAP.  I know that it would be easier to boot DSP by ARM on OMAP, but it would be difficult choice for them.

    By the way, after some trials, I found that there might be some address dependency,

    The following is my decoding result of AIS image which did not boot successfully.  It begins with some PLL, PSC and peripheral initialization code which AIS tool automatically generated, and the my own application code follows them.  Exactly speaking, my code is from 0x11800000.

    Section Load Command (addr=0x00800020, size=704 (0x2c0))
    00800020: 02806828 02b40068 9013008c 10938cf7
    00800030: 7246e6a7 0200b2fb daefac05 eb802200
    00800040: 0f673351 6c6e5e8d 0002d60a 1ce61005
    00800050: 86511640 9e330257 101d0a41 ef620700
    (snip)

    Section Load Command (addr=0x008002e0, size=288 (0x120))
    008002e0: 0124a62a 0290802a 00a5562a 010038ea
    008002f0: 028038eb e24731f7 33f4e246 ec002c00
    00800300: 008038ea 03c08c12 238c002c 5892f813
    00800310: 1d492c6e f86704e8 00001f7a e7c00200
    (snip)

    Section Load Command (addr=0x00800400, size=64 (0x40))
    00800400: 013c54f4 007c0363 80778377 92779377
    00800410: 91779077 01860162 d077d177 eb800200
    00800420: 023c33e6 033c33e6 003c33e4 000c0363
    00800430: 033c33e4 013c52e4 00006000 00000000
    Section Load Command (addr=0x00800440, size=16 (0x10))
    00800440: 008001d0 008001a0 00800168 00800132
    Jump Command (addr=0x00800220)
    Function Execute Command (fxn#=0, cnt=2)
    00000000: 00180001 0000040b
    Function Execute Command (fxn#=3, cnt=8)
    00000000: 18010001 00000002 000000c5 00134832
    00000010: 264a3209 3c14c722 00000492 00000000
    Function Execute Command (fxn#=5, cnt=5)
    00000000: 00000000 3ffffffd 00000000 00000000
    00000010: 00000002
    Function Execute Command (fxn#=7, cnt=1)
    00000000: 00040003
    Function Execute Command (fxn#=7, cnt=1)
    00000000: 01030003
    Function Execute Command (fxn#=7, cnt=1)
    00000000: 010d0003
    Section Load Command (addr=0x11800000, size=65568 (0x10020))
    11800000: 27773677 86779577 053c35c4 01be54f6
    11800010: 02461347 06000041 043f82d5 e2600300
    11800020: e8e6272e 30010f13 208002a5 270012a9
    11800030: 06267756 268016a8 233c62f4 e2200202
    (snip)

    However, when I moved my application from 0x11800000 to 0x11801000, it became to work as expected.

    My understanding is, the preceding parts of AIS are no more required when loading my own application at 0x11800000.  So it should be okay to overwrite the AIS generated code at 0x00800000.

    May I ask you to confirm if there is some address restriction to put application image?  It shouldn't share address where AIS automatically generated code exist?

    Best Regards,
    Yokoyama, Atsushi

  • Hi Atsushi Yokoyama,

    I have tried to boot the LED toggling code on L2 RAM and got succeed.

    C:\ti\OMAP-L138_FlashAndBootUtils_2.40\OMAP-L138\GNU>sfh_OMAP-L138.exe -targetType C6748_LCDK -flashType NAND -flash_noubl gpioLed_L2.ais -p COM47

    I am attaching the binary, you can try the same.

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/gpioLed_5F00_L2.ais

    Linker command file:

    // ============================================================================

    // Linker Command File for Linking c674 DSP Programs

    //

    // These linker options are for command line linking only. For IDE linking,

    // you should set your linker options in Project Properties.

    //         -c                    Link Using C Conventions

    //        -stack     0x1000        Software Stack Size

    //        -heap    0x1000        Heap Area Size

    // ===========================================================================

    -stack 0x1000

    -heap 0x1000

    // ============================================================================

    //                         Specify the System Memory Map

    // ============================================================================

    MEMORY

    {

       L1P:    o = 0x11E00000        l = 0x00008000

       L1D:    o = 0x11F00000        l = 0x00008000

       L2:     o = 0x11800000        l = 0x00040000

       DDR2:   o = 0xC0000000        l = 0x08000000

    SHRAM:  o = 0x80000000        l = 0x00020000  /* 128kB Shared RAM */

    }

    // ============================================================================

    //                 Specify the Sections Allocation into Memory

    // ============================================================================

    SECTIONS

    {

       .cinit        >        L2               // Initialization Tables

       .pinit        >        L2               // Constructor Tables

       .init_array   >        L2               //

       .binit        >        L2               // Boot Tables

       .const        >        L2               // Constant Data

       .switch       >        L2               // Jump Tables

       .text         >        L2               // Executable Code

       .text:_c_int00: align=1024 > L2         // Entrypoint

       GROUP (NEARDP_DATA)                       // group near data

       {

          .neardata

          .rodata

          .bss                                   // note: removed fill = 0

       }             >        L2

       .far: fill = 0x0, load > L2             // Far Global & Static Variables

       .fardata      >        L2               // Far RW Data

       .stack        >        L2               // Software System Stack

       .sysmem       >        L2               // Dynamic Memory Allocation Area

       .cio          >        L2               // C I/O Buffer

       .vecs         >        L2               // Interrupt Vectors

    }

    This is the configuration I used for both apps.

    Boot Mode=(No Config)
    Boot Speed=115200
    Flash Width=0
    Flash Timing=3ffffffc
    Configure Peripheral=False
    Configure PLL0=False
    Configure SDRAM=False
    Configure PLL1=False
    Configure DDR2=False
    Configure LPSC=False
    Configure Pinmux=False
    Enable CRC=False
    Specify Entrypoint=False
    Enable Sequential Read=False
    Use 4.5 Clock Divider=False
    Use DDR2 Direct Clock=False
    Use mDDR=True
    ROM ID=2
    Device Type=1
    Input Clock Speed=24
    Clock Type=0
    PLL0 Pre Divider=2
    PLL0 Multiplier=25
    PLL0 Post Divider=1
    PLL0 Div1=1
    PLL0 Div3=3
    PLL0 Div7=6
    PLL1 Multiplier=20
    PLL1 Post Divider=2
    PLL1 Div1=1
    PLL1 Div2=2
    PLL1 Div3=3
    Entrypoint=0
    SDRAM SDBCR=0
    SDRAM SDTMR=0
    SDRAM SDRSRPDEXIT=0
    SDRAM SDRCR=0
    DDR2 PHY=0
    DDR2 SDCR=0
    DDR2 SDCR2=0
    DDR2 SDTIMR=0
    DDR2 SDTIMR2=0
    DDR2 SDRCR=0
    LPSC0 Enable=15+
    LPSC0 Disable=
    LPSC0 SyncRst=
    LPSC1 Enable=
    LPSC1 Disable=
    LPSC1 SyncRst=
    Pinmux=4:2200+
    App File String=C:\Users\Shankari\Desktop\gpioLed.out;
    AIS File Name=C:\Users\Shankari\Desktop\gpioLed_L2.ais

  • Hi Shankari,

    Yes, the examples in the folders worked fine on my LCDK too, but it's still unclear why my original memory allocation doesn't work. TI documentation doesn't mention such memory allocation restriction.

    Regards,
    Atsushi
  • This post didn't resolve my question but it was marked "answered." Even I clicked "Reject Answer", it is marked "answered" again and again.