I'm trying to understand what state the AM437X Arm is in while the Linux from the SDK is running, so I tried read the CPSR for the mode and the Secure Configuration Register (SCR) for the Secure / Non-Secure state from a kernel module. CPSR showed Supervisor mode, and the "MRC p15, 0, R0, c1, c1, 0" read of the SCR gave an "undefined instruction" exception.
There are three reasons that come to mind why this can happen: 1) the kernel isn't running is Secure state, so SCR isn't visible; 2) the security extensions aren't implemented int the AM437X; and 3) the MRC p15,0,R0,c1,c1,0 instruction isn't being handled by the assember correctly (or maybe the Arm Architecture Reference Manual B4-1704 has a misprint of the instruction).
Taking a step back, I confirmed that the Arm Cortex A9 should include the security extensions and it does according to the Arm Cortex-A9 TRM p23. The TRM p51 also states that "the processor always boots in Supervisor mode in the Secure state". So I tried the same test, but put the SCR read at the very start of U-Boot startup, just after the reset label in arch/arm/cpu/armv7/start.S, where according to the TRM, it should be in Secure state so the SCR will be visible. What I found is that if the SCR read is in MLO, the system totally hangs; if there is no SCR read in MLO, but there is one in u-boot.img, then MLO starts ups, prints its banner, and hangs trying to run u-boot.img.
It appears to me that either the SDK or the AM437X doesn't handle the Arm security extensions, and I'm concluding that the AM437X always runs in the equivalent of Secure mode.
Anybody have any other ideas or has successsfully used the Arm security extensions with the AM437X?
