am437x without DDR3

nima shokouhfar

Hi all

we are developing Ethercat slave device using AM437x and Beckhoff SSC stack code.currently I m ruining our source code on am437x IDK. the current code size is less than 240KByte.

I read many E2E threads which are using am335x without DDR3

since we are developing a very cost sensitive application,I wondered is it possible to design am437x custom board without a DDR3????

Based on am437x spec we suppose to have 512kBytes of memory.which suppose to be enough.

www.ti.com/.../AM4379

On-Chip Memory (Shared L3 RAM)

256KB of General-Purpose On-Chip Memory
Controller (OCMC) RAM
Accessible to All Masters
Supports Retention for Fast Wakeup
Up to 512KB of Total Internal RAM
(256KB of ARM Memory Configured as L3 RAM
+ 256KB of OCMC RAM)

So please let me know if any of your customer attempted mentioned configuration?

thanks in advance.

over 9 years ago

0 Brad Griffis over 9 years ago

TI__Guru*** 125430 points

Absolutely! This was a key architectural consideration of the AM437x. Besides the increased internal memory, we also added a QSPI peripheral that allows you to execute in place (XIP) so that code can run directly from QSPI and not take up RAM space.

0 Brad Griffis over 9 years ago in reply to Brad Griffis

TI__Guru*** 125430 points

Just to clarify slightly, I'm not deeply familiar with the memory requirements of EtherCat. Your initial post sounded like your data requirements were smaller than the physical memory. That being the case, I see no issue.

0 nima shokouhfar over 9 years ago in reply to Brad Griffis

Prodigy 200 points

Hi Brad Griffis

very interesting.

I think even the internal ram suppose to be enough.

However may I have more information regarding XIP?

so may I know what do I have to modify in gel file and bootloader. can you give me application note or wiki page which walks me through the require steps.

thanks a lotttttttttttttttttttt

0 nima shokouhfar over 9 years ago in reply to nima shokouhfar

Prodigy 200 points

Hi Brad Griffi

the Ethercat source code uses sys/bios and MMU. Is it still possible to use XIP in this case too?

regards

0 Brad Griffis over 9 years ago in reply to nima shokouhfar

TI__Guru*** 125430 points

You can still do this with sys/bios and MMU. The basic procedure is to define a section in the linker command file corresponding to your QSPI memory. You would then link all your code as well as initialized data sections into that memory. Your uninitialized data sections would get linked into internal RAM. It's very similar to how you do things on an MCU with integrated flash.

I recommend giving it a try, or if you still need further clarification you may want to start a new thread, since this is a closely related but more specific topic.

0 nima shokouhfar over 9 years ago in reply to Brad Griffis

Prodigy 200 points

Hi Brad Griffis

Thanks a lot for information .I will definitely try it out .

I just created a new thread .

e2e.ti.com/.../515436

Regards

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am437x without DDR3