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ICEv2 Dev Board Questions

John Turner
Prodigy 240 points

I am starting a new design and using the ICEv2 as a reference design.  This being my first stab at an ARM based design I've got some questions:

1. Looking at the data pins on the DDR3, they don't map 1:1.  For example, DQ0 on the memory chip maps to D6 on the AM335x.  Why is that?  Should I copy this or plan on mapping DQ0 to D0, etc?

2. Looking at the USB to JTAG chip (U18), I don't understand the connections at pins 26 (some sort of reset), 28 (why is it tied high) and 32 (why is it tied low).  Can anyone explain these?

3. Also trying to understand my boot options.  There seem to be quite a few on this dev board and I'm sure I don't need them all.  I am building an EtherCAT application and am hoping to just use SPI flash.  Any reason this couldn't be done?

3b. I also don't really understand how that SPI flash gets programmed initially (hardware guy here).  Does that chip indirectly become part of the JTAG chain and get programmed over SPI during the programming of the AM335x?

3c. I see the SPI flash on the ICEv2 board is XIP.  I'm don't fully understand what that means.  Does that mean I could technically execute my program from that chip over SPI?  If I don't intend on running that way do I still need to use XIP flash?

Thanks in advance.

  • 0
    TI__Guru**** 393215 points
    1. On AM335x it's permitted to swap data lines WITHIN the byte lane they belong to, in order to facilitate PCB routing. Swapping across byte lanes is not allowed. Swapping of address and control signals is not allowed too.
    2. Pin 26 issues a system reset through U10. The other two pins have to be tied this way if you want to use the same USB-to-JTAG interface. If you don't need the on-board JTAG you can simply add only the JTAG header with associated passive components (esp. pullups on EMU0 and EMU1 are important).
    3. Boot options can be seen in Table 26-7 from the AM335x TRM Rev. M.
    3b. processors.wiki.ti.com/.../AM335X_StarterWare_Booting_And_Flashing
    3c. XIP is not supported for SPI boot on AM335x.
  • 0 in reply to Biser Gatchev-XID
    Prodigy 240 points

    Thanks for the reply.  Can you give me an explanation as to why the two pins on U10 have to be tied high and low?  I can't find anything that gives an explanation for that.  It doesn't seem to be part of the JTAG function.  Also, the system reset issues from U10, is that reset a part of the JTAG programming function?  Or is it simply a way to be able to independently issue a reset over USB?  I guess what I'm asking is if I really need that reset?

  • 0 in reply to John Turner
    TI__Guru**** 393215 points
    I can't say why these two pins are tied this way, but this is the same on all EVM boards that use FT2232HL, so I suppose this has to do with FT2232HL internal configuration. Maybe the FT2232HL datasheet will have comments on this.

    Yes, this reset is required if you intend to use FT2232HL as a JTAG interface.