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Conflict using omapL138 for NAND & SD

1481708
Intellectual 955 points
Other Parts Discussed in Thread: OMAP-L138, OMAPL138

Hello,

Right now I am using the "Omap L138-EVM Kit provided by Ti". I am trying to clone the BSP provided by them and rebuild an Win CE using visual studio.

I have problem selecting both SD host controller and Nand Flash. I am not able to enable both at a time. So,my WINCE doesn't detect SD card even though there is an SD card slot in the EVM kit.

Can you tell me if there is a way to edit the BSP , so that it lets me enable both the SD and Nand flash  together.

 Am  having the conflict with the pin mux of SD and NAND. The nand which we are using is 8bits . but the bsp which have 16bits .  how to make changes. Could anybody help me to reduce the 16bits nand to 8bit nand . so that i can able to select both together.

 

 

Regards

Vinoth.

  • 0
    TI__Intellectual 1640 points

    Hello Vinoth,

    All the pin mux configurations are in file bsp_cfg.h of the BSP.  However, due to pin mux conflict of the SDHC and NAND, these two features are mutually exclusive in the BSP provided.  If you would like to give it a try to enable both, you may need to modify the bsp_cfg.h file.

    Regards,

    WM

     

  • 0 in reply to WMK
    Intellectual 955 points

    Hello Wm,

     

    Am really new to dis field can you tell me what are the changes i want to make for NAND and SD to work together this is the file which you asked me to change(bsp_cfg.h) .Pls tell where i want to make changes for the similar problem between UPP and LCD. i cant able to select both. tell me the steps to change for that also.

     

    #ifndef __BSP_CFG_H
    #define __BSP_CFG_H

    //------------------------------------------------------------------------------
    //
    //  SYSCONF Register defaults
    // 
    #if BSP_UPP == 1 && (BSP_CLD == 1 || BSP_DISPLAY_LCD == 1)
    #error "ERROR - pinmux conflict: Cannot include both LCD driver and UPP driver"
    #endif

    #if BSP_SDHC == 1 && BSP_NAND == 1
    #error "ERROR - pinmux conflict: Cannot include both SDHC driver and NAND flash driver"
    #endif

    #define BSP_SYSCONF_KICK0R_VAL      0x83E70B13
    #define BSP_SYSCONF_KICK1R_VAL      0x95A4F1E0

    #if (BSP_CLD == 1) || (BSP_DISPLAY_LCD == 1)

    // Sets the muxed pins to use the LCD signals

    // Pinmux5[31:28] is 0x8 to enable GPIO2[8] (GPIO_40) for LCD panel
    // power (raster display driver).  [3:0] for GPIO2[15] for backlight power.
    #define CLD_SYSCONF_PINMUX5_VAL     0x80000018
    // LCD_D[7:2]
    #define CLD_SYSCONF_PINMUX16_VAL    0x22222200
    // LCD_D[15:10], LCD_D[1:0]
    #define CLD_SYSCONF_PINMUX17_VAL    0x22222222
    // LCD_MCLK, LCD_PCLK, LCD_D[9:8]
    #define CLD_SYSCONF_PINMUX18_VAL    0x22000022
    // LCD_VSYNC, LCD_HSYNC, LCD_AC_ENB_CS
    #define CLD_SYSCONF_PINMUX19_VAL    0x02000022
    #else
    #define CLD_SYSCONF_PINMUX16_VAL    0x00000000
    #define CLD_SYSCONF_PINMUX17_VAL    0x00000000
    #define CLD_SYSCONF_PINMUX18_VAL    0x00000000
    #define CLD_SYSCONF_PINMUX19_VAL    0x00000000
    #define CLD_SYSCONF_PINMUX5_VAL     0x00000000
    #endif

    #if BSP_UPP == 1

    // Sets the muxed pins to use the UPP signals

    // UPP_CH1_WAIT, UPP_CH1_ENABLE, UPP_CH1_START, UPP_CH1_CLK
    #define UPP_SYSCONF_PINMUX13_VAL    0x44440000
    // UPP_D[15:10], UPP_2xTXCLK
    #define UPP_SYSCONF_PINMUX14_VAL    0x44444400
    // UPP_D[9:2]
    #define UPP_SYSCONF_PINMUX15_VAL    0x44444444
    // UPP_DX[15:10], UPP_D[1:0]
    #define UPP_SYSCONF_PINMUX16_VAL    0x44444444
    // UPP_DX[9:2]
    #define UPP_SYSCONF_PINMUX17_VAL    0x44444444
    // UPP_CH0_WAIT, UPP_CH0_ENABLE, UPP_CH0_START, UPP_CH0_CLK, UPP_XD[1:0]
    #define UPP_SYSCONF_PINMUX18_VAL    0x00444444
    #else
    #define UPP_SYSCONF_PINMUX13_VAL    0x00000000
    #define UPP_SYSCONF_PINMUX14_VAL    0x00000000
    #define UPP_SYSCONF_PINMUX15_VAL    0x00000000
    #define UPP_SYSCONF_PINMUX16_VAL    0x00000000
    #define UPP_SYSCONF_PINMUX17_VAL    0x00000000
    #define UPP_SYSCONF_PINMUX18_VAL    0x00000000

    #endif
       
    #if BSP_NAND == 1
    #define NAND_SYSCONF_PINMUX6_VAL    0x01000000
    #define NAND_SYSCONF_PINMUX7_VAL    0x11111111
    #define NAND_SYSCONF_PINMUX8_VAL    0x11111111
    #define NAND_SYSCONF_PINMUX9_VAL    0x11111111
    #define NAND_SYSCONF_PINMUX10_VAL   0x11111111
    #define NAND_SYSCONF_PINMUX11_VAL   0x11111111
    #define NAND_SYSCONF_PINMUX12_VAL   0x11111111
    #else
    #define NAND_SYSCONF_PINMUX6_VAL    0x00000000
    #define NAND_SYSCONF_PINMUX7_VAL    0x00000000
    #define NAND_SYSCONF_PINMUX8_VAL    0x00000000
    #define NAND_SYSCONF_PINMUX9_VAL    0x00000000
    #define NAND_SYSCONF_PINMUX10_VAL   0x00000000
    #define NAND_SYSCONF_PINMUX11_VAL   0x00000000
    #define NAND_SYSCONF_PINMUX12_VAL   0x00000000
    #endif

    #if BSP_SDHC == 1
    // SD0 and INS/WP GPIOs for SD card
    #define SDHC_SYSCONF_PINMUX10_VAL   0x88222222
    #else
    #define SDHC_SYSCONF_PINMUX10_VAL   0x00000000
    #endif

    // OHCI VBUS enable pin, GPIO2[4]
    #define OHCI_SYSCONF_PINMUX6_VAL    0x00008000

    // Pin muxing is set up to use UART2 by default. If you need to use UARTs 0 and 1, you
    // will need to change the pin muxing accordingly.

    // McASP for AIC3106
    #define BSP_SYSCONF_PINMUX0_VAL     0x44111111

    // McASP AXR[11], AXR[12] for AIC3106
    // GPIO0 and GPIO7 for GPIO testing
    #define BSP_SYSCONF_PINMUX1_VAL     0x80011008

    // MII for Ethernet
    #define BSP_SYSCONF_PINMUX2_VAL     0x88888880
    #define BSP_SYSCONF_PINMUX3_VAL     0x88888888

    // Enable UART1 and UART2, I2C0 bus, MDIO
    #define BSP_SYSCONF_PINMUX4_VAL     0x22222288

    // Pinmux5[7:4] is 2 to switch pin E19 to EPWM1B for use in the PWM driver
    #define PWM_SYSCONF_PINMUX5_VAL     0x00000020

    #define BSP_SYSCONF_PINMUX5_VAL     (CLD_SYSCONF_PINMUX5_VAL | PWM_SYSCONF_PINMUX5_VAL)
    #define BSP_SYSCONF_PINMUX6_VAL     (NAND_SYSCONF_PINMUX6_VAL | OHCI_SYSCONF_PINMUX6_VAL)
    #define BSP_SYSCONF_PINMUX7_VAL     NAND_SYSCONF_PINMUX7_VAL
    #define BSP_SYSCONF_PINMUX8_VAL     NAND_SYSCONF_PINMUX8_VAL
    #define BSP_SYSCONF_PINMUX9_VAL     NAND_SYSCONF_PINMUX9_VAL
    #define BSP_SYSCONF_PINMUX10_VAL    (NAND_SYSCONF_PINMUX10_VAL | SDHC_SYSCONF_PINMUX10_VAL)
    #define BSP_SYSCONF_PINMUX11_VAL    NAND_SYSCONF_PINMUX11_VAL
    #define BSP_SYSCONF_PINMUX12_VAL    NAND_SYSCONF_PINMUX12_VAL
    #define BSP_SYSCONF_PINMUX13_VAL    UPP_SYSCONF_PINMUX13_VAL
    #define BSP_SYSCONF_PINMUX14_VAL    UPP_SYSCONF_PINMUX14_VAL
    #define BSP_SYSCONF_PINMUX15_VAL    UPP_SYSCONF_PINMUX15_VAL
    #define BSP_SYSCONF_PINMUX16_VAL    (UPP_SYSCONF_PINMUX16_VAL | CLD_SYSCONF_PINMUX16_VAL)
    #define BSP_SYSCONF_PINMUX17_VAL    (UPP_SYSCONF_PINMUX17_VAL | CLD_SYSCONF_PINMUX17_VAL)
    #define BSP_SYSCONF_PINMUX18_VAL    (UPP_SYSCONF_PINMUX18_VAL | CLD_SYSCONF_PINMUX18_VAL)
    #define BSP_SYSCONF_PINMUX19_VAL    CLD_SYSCONF_PINMUX19_VAL

     

    Regards

    Vinoth.

  • 0 in reply to WMK
    Genius 5120 points

    Hi ,

    We are using OMAP-L138 EVM from LogicPD.

    We have SOM, Baseboard and UI Board.

    I am trying to understand why SDHC0 and NAND need to be mutually exclusive although NAND Interface on OMAP-L138 EVM is not using any of the followign signals

     

    EMA_A[23]
    EMA_A[22]
    EMA_A[21]
    EMA_A[20]
    EMA_A[19]
    EMA_A[18]

    which are shared between SDHC0 and NAND.

    Can someone please clarify the above.

    Thank You & Regards,

    GSR

  • 0 in reply to 1258021
    TI__Intellectual 1640 points

    Hello GSR,

    Thanks for pointing out this over sight.  Yes indeed, the SDHC0 and NAND should not be mutually exclusively.  We'll fix the error in the next release.

    Meanwhile, as a workaround, you may update OMAPL138_AM18X\SRC\INC\bsp_cfg.h:

    Comment out the SDHC + NAND check:

    // #if BSP_SDHC == 1 && BSP_NAND == 1

    // #error "ERROR - pinmux conflict: Cannot include both SDHC driver and NAND flash driver"

    // #endif

    Set the NAND pinmux10 and pinmux11 values to 0:

    #define NAND_SYSCONF_PINMUX10_VAL   0x00000000

    #define NAND_SYSCONF_PINMUX11_VAL   0x00000000

    Update C:\WINCE600\PLATFORM\OMAPL138_AM18X\CATALOG\OMAPL138_AM18X.pbcxml.

    Remove lines 275 and 313:

        <ChooseOneGroup>true</ChooseOneGroup>

    This should enable both NAND and SDHC to be selected in the catalog together.

    Regard,

    WM

  • 0 in reply to WMK
    Genius 5120 points

    Hi WM,

    Thank You for the clarification.

    Regards,

    GSR

  • 0 in reply to WMK
    Prodigy 10 points

    Hello, I have you TI WHO provide the OMAPL138_AM18x BSP, front EBOOT part I transplant well,  now I want to transplant the kernel part, (NK. BIN), found that all peripheral drive are not loaded into NK. BIN (After completion of a compiler generated size only 14 m), where can I  need to debug it, such as OAL folder or other folds?

    I want to let display the wince6.0 user interface. thank you