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TM4C1294NCPDT TCP connections memory usage

Other Parts Discussed in Thread: TM4C1294NCPDT, TM4C1294KCPDT

Hi All,

We are designing a Ethernet to serial converter using TM4C1294NCPDT MCU. We are planning to use TI BIOS + NDK . We have a requirement to support 5 simultaneous TCP connections. This TM4C1294NCPDT MCU has 256 KB SRAM. Please let me know this 256 KB SRAM will be adequate to handle the memory bandwidth required for 5 simultaneous TCP connections?

Please let me know is there any memory calculations for TCP connections w.r.t to no of simultaneous connections

Thanks,

P.Ashok

  • P.Ashok,

    ASHOK palaniswamy said:
    Please let me know is there any memory calculations for TCP connections w.r.t to no of simultaneous connections

    When you create TCP sockets, each socket will allocate memory for a TX and RX buffer.  The default size for these buffers for Tiva is 2KB.

    You could compute the amount of memory needed like this:

    numTcpSockets * (TxBufSize + RxBufSize) = memory used

    ASHOK palaniswamy said:
    Please let me know this 256 KB SRAM will be adequate to handle the memory bandwidth required for 5 simultaneous TCP connections?

    Assuming that default size is large enough for your connections, then you could calculate the size needed with the above formula:

    5 * (2K + 2K) = 20KB (default case)

    Now, let me ask this.  Do you know how "active" you expect your 5 TCP connections be?

    For example, at one extreme, you might have a minimal app, that collects data for several hours, and then wakes up only every once in a while to send an update on what was collected.  This would be a very minimal use case and you wouldn't need very large TCP socket buffers, you could even reduce the size down from the 2K default.


    At the other extreme, each of these 5 connections might be constantly sending data at full speed.  In this case, you might need to increase the size of the TX and RX buffers.  For example, let's say you needed 16K for your TX and RX buffers.  In that case, you'd use a lot more memory:

    5 * (16K + 16K) = 160K


    But, it should still fit.  However, notice that you need to still make sure that there is room for the rest of your application, as well as BIOS + NDK stack (see the NDK size benchmarks in the NDK release notes for some example footprint sizes).  Given that, you can run out of space fast if you require large TX and RX buffer sizes.

    Steve

  • Hi Steve,

    Thanks for the details. We are planning to use external SRAM for avoid the memory overflow. I have another question the MCU TM4C1294KCPDT is operation with 120MHZ as maximum. Is the speed and performance of the CPU is sufficiant to handle the 5 active TCP connection ? The total bandwitdh of all the 5 connections will not exceed 460800 bytes/ sec .  

    Below is our design

    (UART) Modem with full H/W flow <---------> 5 Active TCP connections. (Ethernet)

    I belive the MCU performance is sufficiant to handle this. Please share your comments also.

    Thanks,

    P.Ashok

  • The TM4C129x can handle that. We've ran more than 5 TCP Echo's at a higher through-put than that.

    Additionally, we have a write-up on memory usage in the NDK that you might find useful: processors.wiki.ti.com/.../TI-RTOS_Networking_Stack_Memory_Usage

    Todd