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Question about program_accumulator

Hi all,

I have a question about the text of program

 

/* This function programs a Hi or Lo Accumulator channel. */
void program_accumulator(Uint16 pdsp, Qmss_AccCmd *cmd)
{
Uint16 idx;
Uint32 *tmplist;
Uint32 *reg;
if (pdsp == 1)
reg = (Uint32 *)(PDSP1_CMD_REGION + 4*4); //point to last word
else
reg = (Uint32 *)(PDSP2_CMD_REGION + 4*4); //point to last word
tmplist = ((uint32_t *) cmd) + 4; //write first word last
for (idx = 0; idx < 5; idx ++)
{
*reg-- = *tmplist--;
}
/* wait for the command byte to clear. */
reg++;
do
{
result = (*reg & 0x0000ff00) >> 8;
} while (result != 0);
}

what is it?
It is SPRUGR9F—March 2013 KeyStone Architecture Multicore Navigator User Guide, page 145, Appendix A—Example Code Utility Functions

Best regards, 

Oleg

  • Hi,

    Thanks for your post.

    As per my understand the result indicates the command results would then be read from the return code field and kindly check the explanation below:

    When a command is written, the host CPU must write the word containing the command byte last. The command byte is written with bit 7 set to signify a command to the PDSP. The command buffer is in internal RAM and should not be marked as cacheable by the host CPU. If the RAM is cached on the host CPU, then the host must perform two separate writes and cache flushes; the first for writing the parameters, and then a second independent write and cache flush for writing the command word. All writes should be performed as 32 bit quantities.

    Once the command is written, the PDSP will clear the command field upon command completion. The command results can then be read from the return code field

    For more details, kindly refer the section 4.3.1 "Descriptor accumulation firmware" topic from the sprugr9h.pdf doc. below:

    http://www.ti.com/lit/ug/sprugr9h/sprugr9h.pdf

    Thanks & regards,

    Sivaraj K

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  • Hi Sivaraj,
    Thakn you for your clear answer!
    Best regards,
    Oleg