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AM437x: eMMC support in U-boot

Hi,

a customer is testing EMMC support in u-boot with latest PSDK. They have it working after some pinmux patches, config changes and handling the MMC vs NAND GPIO.

However they are seeing that it only works on power cycle. If they do a soft reboot, it does not work anymore.

We are noticing that there is the GPMC_WPn pin that can control the EMMC RST. We are trying to make sure the EMMC gets properly reset before the mmc init.

Are there any other things recommended, anything else we could miss to make this EMMC work on soft reboot?

Thanks,

--Gunter

  • Hi,

    I don't think we can give any advice without more information from you. Please give a detailed description of the hardware and software configuration and what issues you see.
  • Hi Biser,

    standard deliverables are being used
    * AM437x GP EVM Rev1.4a with EMMC
    * Latest PSDK 2.00.02.11 and the u-boot from there as the baseline

    Again the customer enables the pinmux for the EMMC, changes u-boot config, handles the NAND or EMMC GPIO. See below.

    The EMMC works now, but only on a cold boot. If doing a soft reboot, something is still missing. We suspect the EMMC RST line, and trying to test that. The question is whether we have tested EMMC with soft reboot on our end and found what fixes it.


    static struct module_pin_mux mmc2_pin_mux[] = {
    {OFFSET(gpmc_ad0), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* AD0 */
    {OFFSET(gpmc_ad1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* AD1 */
    {OFFSET(gpmc_ad2), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* AD2 */
    {OFFSET(gpmc_ad3), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* AD3 */
    {OFFSET(gpmc_ad4), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* AD4 */
    {OFFSET(gpmc_ad5), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* AD5 */
    {OFFSET(gpmc_ad6), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* AD6 */
    {OFFSET(gpmc_ad7), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* AD7 */

    {OFFSET(gpmc_csn1), (MODE(2) | PULLUP_EN | RXACTIVE)},
    {OFFSET(gpmc_csn2), (MODE(2) | PULLUP_EN | RXACTIVE)},

    {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN)}, /* eMMC Reset */
    {OFFSET(spi2_cs0), (MODE(9) | PULLUP_EN)}, /* GPIO0_23 SEL_eMMCorNANDn */

    {-1},
    };
    2. Added this to enable_board_pin_nmux()
    #if defined(CONFIG_NAND)
    configure_module_pin_mux(nand_pin_mux);
    #else
    configure_module_pin_mux(mmc2_pin_mux);
    #endif
    3. I did remove NAND from defconfig:
    CONFIG_ARM=y
    CONFIG_AM43XX=y
    CONFIG_TARGET_AM43XX_EVM=y
    CONFIG_SPL=y
    CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
    # CONFIG_CMD_IMLS is not set
    # CONFIG_CMD_FLASH is not set
    # CONFIG_CMD_SETEXPR is not set
    CONFIG_SPI_FLASH_BAR=y
    CONFIG_SPI_FLASH=y


    Regards,
    --Gunter
  • Hi Gunter,

    Thanks for the details. Can you check the SEL_eMMCORNANDn signal state after reboot? It should be high for eMMC.