Questions bootloader using I2C EEPROM + EMIF NOR for c6678

Sungyeol Park

Hello,

I have some questions about, c6678 bootloader.

My system is custom board using c6678 DSP, and it has EEPROM by I2C // EMIF16 CE0 is connected to FPGA // EMIF16 CE1 is connected to NOR Flash mem.

For booting my DSP, I think the process is "RBL -> IBL from EEPROM -> load Image to DDR from NOR flash(EMIF CS1) -> ..."

So, I think that I have to do

1) Modifying IBL code for load from NOR EMIF CS1

2) make Image writer for EMIF NOR

My Question is "Is it available steps for booting DSP?"

and, if it possible then is there any source for IBL code for NOR EMIF?

(CCS5.5.0, MCSDK_2_01_02_06, for Custom Board)

over 9 years ago

0 Raja over 9 years ago

TI__Guru* 81335 points

Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com). Please read all the links below my signature.

We will get back to you on the above query shortly. Thank you for your patience.

Note: We strongly recommend you to create new e2e thread for your queries instead of following up on an old/closed e2e thread, new threads gets more attention than old threads and can provide link of old threads or information on the new post for clarity and faster response.

0 Raja over 9 years ago

TI__Guru* 81335 points

Hi,

Your understanding is correct however we do not have IBL code for NOR EMIF.

Most of your queries has been addressed in "KesytoneI Bootloader Resources and FAQ" page. Please find the link below. Please refer FAQ 5.22 and 5.28.

processors.wiki.ti.com/.../KesytoneI_Bootloader_Resources_and_FAQ

Thank you.

0 Sungyeol Park over 9 years ago in reply to Raja

Prodigy 100 points

Thanks for your Reply!

I saw IBL C code, and found the code for update DEVICE_REG_DEVSTAT read from FPGA by SPI.
so, I clear these lines, our board isn't connected FPGA by SPI.

and then, I have to change codes for config EMIF16, Read Image from EMIF CE1 memory.
But I can't find where is the point to modify NOR EMIF and read the Image from EMIF CE1.

Please help me once again.

thanks.

0 Raja over 9 years ago in reply to Sungyeol Park

TI__Guru* 81335 points

Please refer the main of iblmain.c for sequence. Also refer src\norboot\norboot.c

#if (!defined(EXCLUDE_NOR_EMIF) && !defined(EXCLUDE_NOR_SPI))
            case ibl_BOOT_MODE_NOR:
                iblPmemCfg (ibl.bootModes[boot_mode_idx].u.norBoot.interface, ibl.bootModes[boot_mode_idx].port, TRUE);
                /*Print something to UART, max len=80, if len is pased as 0 UART prints entire string upto '\n' or max len */
                uart_write_string("IBL: Booting from NOR",0);
                iblNorBoot (boot_mode_idx);
                break;
#endif

Thank you.

0 Sungyeol Park over 9 years ago in reply to Raja

Prodigy 100 points

Hi Raja,

I modified IBL code and make new Nor Writer program, but it doesn't work.

1. I changed device.c like this

ibl_t c6678_ibl_config(void)
{
...
ibl.emifConfig[0].csSpace = 3; //EMIF CE1
ibl.emifConfig[0].busWidth = 16; // for 16bit Data EMIF
ibl.emifConfig[0].waitEnable = 0;
...
ibl.bootModes[0].u.norboot.interface = ibl_PMEM_IF_CHIPSEL_3;
}

2. iblinit.c

main()
{
...
if(IBL_ENTER_ROM)
{
//iblEnterRom();
DEVICE_REG32_W(DEVICE_REG_DEVSTAT,0x0000080B); //Only for I2C-NOR Flash
}

3. iblmain.c

main()
{
...
#if (!defined(EXCLUDE_NOR_EMIF)||!defined(EXCLUDE_NOR SPI)) // && -> ||
case ibl_BOOT_MODE_NOR:
iblPmemCfg(ibl.bootModes[boot_mode_idx].u.norBoot.interface, ibl.bootModes[boot_mode_idx].port, FALSE); // nand_enable -> False for NOR EMIF
...
}

After write this IBL to EEPROM, When boot runs, I received message from the board infinite text Strings " IBL: Boot from Nor"

So, I checked my image file(.bin file) but it doesn't have any error, It runs well in EVM or in my custom board by loading an emulator.

Also, NOR writer works well, after Write process, I confirmed in CCS Memory browser Address 0x74000000, and the data starts 0x74 0x45 0x4C 0x46 ...
When IBL read entry address, however, All of Data is NULL.

Can IBL access CS3(EMIF CE1)? I found that only CS2(EMIF CE0) is available for bootload. <- I understood it is only for bootload directly from EMIF16. So, I tried to modifying IBL, but isn't work...
Please confirm it once again.

Thank you.

Processors

Processors forum

Questions bootloader using I2C EEPROM + EMIF NOR for c6678