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Loading DSP images from CCS without using MPM

Other Parts Discussed in Thread: TCI6638K2K, TCI6636K2H

In this case, I want to archieve debug DSP part thrugh CCS of IPC examples. According to the MCSDK's System Management, 

by default, the DSP cores are powered down by u-boot at the time of EVM boot. After kernel is running, MPM can be used to load

and run DSP images from linux command-line/utility. Rather than using MPM, if you want to use CCS to load and run DSP images,

then set the following setting in u-boot prompt:

setenv debug_options 1

saveenv

reset

However, it does not work. There are two pictures caughted in my opration.

1.the u-boot environment

2.debug my dsp binary program through CCS

-------------------------------------------------------------------------------------------------------------------------------------------------------------------

Platform: EVMK2H

PDK version: ti-processor-sdk-linux-k2hk-evm-02.00.02.11 && ti-processor-sdk-rtos-k2hk-evm-02.00.02.11

Filesystem version: using the image from ti-processor-sdk-linux-k2hk-evm-02.00.02.11

Examples I'm running : IPC3.42XX/examples/TCI6636_linux_elf/ex02_messageq


----------------------------------------------------------

Xiaop

  • Hi Xiaop,

    Will post you the step by step procedure shortly on debugging the IPC.
  • Hi Shankari,

    Thanks for your help in advance.

    --------------------------

    Regards,

    xiaop

  • Hi Xiaop,

    The error appears to me that the C66x is not taken out from reset.

    Follow this wiki to do that and revert to us.

  • Hi Shankari,

    This is a useful wiki for DSP side loading only.

    My application is a MCSDK based ARM + DSP IPC framework. Here, I am facing the problem while loading MASTER side build ARM .out image onto one of the CortexA15_1 core through CCS after launching target configuration ccxml file.

    Below are the error messages got during loading ARM .out image:

    CortexA15_1: Trouble Writing Memory Block at 0x8134 on Page 0 of Length 0x28dc: (Error -1065 @ 0x3D5A) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.14.5)
    CortexA15_1: Unable to terminate memory download: NULL buffer pointer at 0x3aa4
    CortexA15_1: GEL: File: F:\Rpraveen_workspace\uu_hies_sift_plus_fmRansac\uu_hies_sift_fmRansac_tci6638k2k_master.out: Load failed.

    Please suggest me how to overcome this issue.

    Regards,
    Hemanth, P
  • Hi, Shankari

        I have done updated my emulation package to latest version. However, I can't find a

    GEL file corresponding to EVMK2H. There is a gel file in the programEVM part of MCSDK, but it is recommended not to use this file outside burning images.

         Could you post the GEL file here? Thanks a lot.

    -----------------------

    Regards,

    xiaop

  • Hi Xiaop,


    Okay, let me try it on my board and update you. I hope we may need to change the gel file for K2H/K2E gel files as its just done for K2G.

    The other method is that, you can load and run the mpmsrv out file via MPM utility to wakeup the DSP.


    C:\ti\mcsdk_bios_3_01_04_07\examples\mpm\mpmsrv_keystone2_example\Debug\mpmsrv_keystone2_example.out

    mpmcl load dsp0 mpmsrv_keystone2_example.out
    mpmcl run dsp0

    Now try to connect the DSP core0 in CCS debug mode.

    Please try it and update to me.

    Visit this thread, in which I have posted the detailed step on debugging the IPC- Image processing demo.

  • Hi, Shankari

    First of all, I want to answer the question about GEL file for EVMK2H. I have find a GEL file in the CCS6 dir named  xtcievmk2x.gel, and 

    took  all the dsp cores out of reset sucessfully. Debuging the IPC example in DSP part is the next thing I have done, however, I find there is 

    another thing confused me. I can compile the core0 program sucessfully, but it of no use to run. I will explain that in detail:

    1.the tree of /opt/ti/ipc_3_42XX/examples/TCI6636_linux_elf/ex02_messageq list below:

    2.Because of I only use the source file of core0 and host, so I just list the structure about my problem. Then I use the sourcre file of core0 and shared 

    to construct a CCS project named TCI6636K2H_DSP, configurations list below:

    3.there is point I want to mentioned, I build the project just according to the makefile in the source file in IPC examples. And compile it sucessfully. And 

    post the binary file TCI66K2H_DSP.out to root dir. The binary file for test list below

    4. the program running succesfully when I use the server_core0.xe66, which compile without CCS and results list below

    5. when I use the binary from CCS compiled, the results is kind of different, and I can't figure it out. Here I know there is no information like

    "creating channel rpmsg-proto addr: 0x3d", whose results list here:

    6.this is the problem I am confused here.

  • Then I do as you mentioned above in the wiki. I do as follow to make DSP cores out of reset. And it really work well.

    8.The discript works well. Then I loaded my program I build before. And debug it wihout breakpoints.

    9. The same wrong results as post above. And I don't how to solve it.

    Finally, I have tested the method you mentioned by using loading mpm example, and have the same results.

    I know how to debug my program through CCS when botting from SPI boot mode. However, there is another problem 

    I am facing with I don't know why I can't run the program sucessfully. And the problem is refeered to the configuration in

    the CCS project. And I am trying to figure it out. 

    ----------------------

    Regards,

    xiaop

  • Xiaop,

    This is the step by step procedure for debugging ex02_MessageQ example on K2E board

    Debugging steps:

    ================

    mpmcl load dsp0 server_core0.xe66

    mpmcl run dsp0

    Do not make any changes in the BOOT switch settings of the EVM

    In CCS, Launch the empty K2E cxml file without any Gel file

    connect target

    Load --> load symbols --> select server*.xe66 Put more Hardware breakpoints after browsing the map file. run

    In the console of ( Linux machine ) launch the app_host ./app_host CORE0

     

  • Hi, Shankari

    Thank you for your help first. I am wondering about how do you compile the CORE0 project in the CCS, or just copy

    this from Ubuntu or Other Linux OS? Because the binary you use named Core.xe66, and I have tried compile it in my CCS, however, there is a 

    problem I posted ahead you post this thread.

    -----------------------

    Regards,

    xiaop

  • Hi Xiaop,

    The compilation of the the source code of CORE0 should be done using the Linux machine. After generating the binary, " server_core0.xe66", you can copy it into the machine where you run CCS and using the Load symbol option, you can load this binary.

    The following are the steps to build the ex02 example.

    Install processor SDK 2.0.2 and you will get the ipc_3_42_00_02 installed in your amchine.

    You will find the example ex02_messageq.

    1. #cd  /opt/ti/ipc_3_42_00_02/examples/66AK2E_linux_elf/ex02_messageq

    2  #gedit product.mak

    DEPOT = /opt/ti

    #### Linux toolchain ####

    TOOLCHAIN_LONGNAME     = arm-linux-gnueabihf

    TOOLCHAIN_INSTALL_DIR  = /home/shankari/workdir/keystone/processor_sdk_02_00_02_11/gcc-linaro-4.9-2015.05-x86_64_arm-linux-gnueabihf

    TOOLCHAIN_PREFIX       = $(TOOLCHAIN_INSTALL_DIR)/bin/$(TOOLCHAIN_LONGNAME)-

    BIOS_INSTALL_DIR       = /opt/ti/bios_6_45_01_29

    IPC_INSTALL_DIR        = /opt/ti/ipc_3_42_00_02

    XDC_INSTALL_DIR        = /opt/ti/xdctools_3_32_00_06_core

    #### BIOS-side toolchains ####

    gnu.targets.arm.A15F   = /opt/ti/ccsv6/tools/compiler/gcc-arm-none-eabi-4_8-2014q3

    ti.targets.elf.C66     = /opt/ti/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0

    3. #make clean

    4.#make

    All the best,