Hi,
We are experiencing endurance issues on a omx based video decoding application after running for two days, the actual issue is a crash on the VPSS with an exception thread that was discussing on the following thread:
https://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/509030
We were able to check what was the PC value of the M3 coprocessor using the log from the thread exception error. Using the map file of the firmware, we were able to determine that it crashed in the function diofq_fqbufmgr_init_create_params. This function is in the VPSS_M3_CODE region of the Memory Map (according to processors.wiki.ti.com/.../EZSDK_Memory_Map). So, we decided to load the VPSS firmware and grabbed it back from memory to check if there is a corruption on that memory section, but we found that this function is on the VPSS_M3_DATA region. We are wondering why it is on the data region instead of the code region, we suppose that it has to be in the code region because it is a function.
If I load the VPSS and the HDVICP firmwares and grab them back from memory, we found that the function is in the VIDEO_M3_DATA region. Why it is on the data region of the HDVICP if it is a VPSS function?
Does the M3 have its own MMU unit? Could be possible that the exception error is produced by a corruption in the MMU unit for the M3 core?
Any help would be appreciated.
Thanks,
Eugenia
