AM571x GPMC performance with NAND Flash

dhanya g p

Other Parts Discussed in Thread: AM5716

1. What is the maximum Read and Write speed achievable in AM5716 GPMC interface with ONFi NAND Flash

2. How many chip selects are supported by AM5716 GPMC for the external NAND Flash memory?

3. Boot Memory has to be connected to CS0 alone?

4. Our requirement is to use high ONFI_NAND Flash memory (2Tb to 4Tb) with higher through put (min. 83MB/Sec). What is the standard AM5716 supports for the NAND Flash interface like NV-DDR, NV-DDR2 or NV-DDR3?

over 10 years ago

0 Biser Gatchev-XID over 10 years ago

TI__Guru**** 393215 points

1. This would depend on the NAND timings. See section 7.11.3 from the AM571x Datasheet Rev. K.
2. Eight.
3. Yes.
4. Standard NAND access is supported only.

0 dhanya g p over 10 years ago in reply to Biser Gatchev-XID

Prodigy 30 points

Thank you Sir for your reply.

From AM571x TRM, SPRUHZ7B–August 2015–Revised April 2016, Page:3582

Requirement 4:

NAND access cycles hold 8 or 16 bits of data each (1 or 2 bytes); Each NAND cycle takes at least four cycles of the GPMC internal clock. This means the NAND flash timing parameters must define a RDCYCLETIME and a WRCYCLETIME of at least four clock cycles after optimization when using the BCH calculator.

From datasheet, page: 149, GPMC_FCLK maximum is 266MHz.

So my understanding is, maximum data speed possible through GPMC NAND flash is 266M/4 = 66.5MB/s.

Kindly confirm whether my understanding is correct.

Thanks

Dhanya

0 Biser Gatchev-XID over 10 years ago in reply to dhanya g p

TI__Guru**** 393215 points

Yes, this is correct.

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AM571x GPMC performance with NAND Flash