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AM572x power-down

I understand that the PMIC for the AM572x is capable of enforcing the power-down sequencing for the AM572x as long as PMIC RESET_IN is driven low at least 1.1ms before the main supply to the PMIC collapses.

In the AM572x GP EVM (sheet 8), it looks as though a supervisory circuit (TPS3808G09) is used to do this.  I am, however, unsure as to why this version of the supervisory circuit, which has a 0.9V supply and 0.84V threshold, is used.  I note that the minimum input voltage to the PMIC is 3.135V.

Any clarification you are able to provide on this would be much appreciated.

Thanks

  • I will ask the factory team to comment. By the way, TPS3808G09 has a Vcc supply voltage range from 1.7V to 6.5V.
  • Hi Biser

    Thanks. I did note the Vcc supply range for the TPS3808G09, but am unsure how this circuit meets the requirement to drive RESET_IN low before the main supply to the PMIC collapses if the same supply is sensed by the supervisory circuit and thus only drives RESET_IN low when the threshold of 0.84V is reached (at this time the supply has already collapsed).

    Thanks
  • Your concern is valid.

    It appears the wrong supervisor device was installed in position U13. TI part number TPS3808G33 should have been used to reset the PMIC when the input supply falls below 3.07 volts. The PMIC low voltage lock-out will trigger at 2.75 volts and disables all PMIC outputs. Therefore, the PMIC input supply should have enough capacitance to hold the voltage above 2.75 volts for 1.1ms after the PMIC reset is asserted by U13 when the voltage drops below 3.07 volts.

    Regards,
    Paul