I note that both the GP EVM and IDK contain clamp circuits to hold the VDD_SHV5 and VDD_3V3 rails at least 2V above VDD_1V8 and that this requirement is denoted in the AM572X datasheet in the guidance for power-down sequencing.
I also note that within the user guide for the Industrial Developer Kit, known deficiency A.15 states that the "AM572x IDK EVM design contains 2 clamp circuits that may not be necessary". The explanation that is given is as follows:
The companion PMIC, TPS6590377, was enhanced to provide a shortened shut-down sequence that enforces the DM requirements in a time period (~1ms) that the PMIC input can hold up the supplies. The PMIC also has supply discharge resistors to pull down the supplies quickly when they are turning off. These 2 capabilities in the companion PMIC make the clamp circuits superfluous. However, designs that use REGEN1 to power the VDDSHVx supplies through a power switch will still need the clamp circuit. The power switches available do not discharge the supplies quick enough.
Can you confirm that as long as REGEN1 is not used to power the VDDSHVx supplies that these clamp circuits are no longer required?
