How to change the clock frequency of tlv320aic31xx

tracy mcgrady

Intellectual 520 points

Other Parts Discussed in Thread: TLV320AIC3101, TLV320AIC3106

hi,ti employee

chip:8168

SDK:DVRRDK_04.00.00.03

linux lsp:

tlv320aic3101 connect a 27MHZ crystal to it's MCLK, and i found in linux driver the default value is 24.56MHZ，so I change it to 27MHZ

diff --git a/sound/soc/davinci/ti81xx-evm.c b/sound/soc/davinci/ti81xx-evm.c
index 4afed1d..88809f5 100755
--- a/sound/soc/davinci/ti81xx-evm.c
+++ b/sound/soc/davinci/ti81xx-evm.c
@@ -40,9 +40,10 @@ static int ti81xx_evm_hw_params(struct snd_pcm_substream *substream,
        struct snd_soc_dai *codec_dai = rtd->codec_dai;
        struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
        unsigned sysclk, fmt = 0;
+    printk("==================In ti81xx_evm_hw_params\n");
        
        /* default */
-       sysclk = 24576000;
+       sysclk = 27000000;
        
        if (!strcmp(rtd->dai_link->name, "TVP5158AUDIO")) {
                /* AFSR -> falling edge, ACLKX -> rising edge, 1 bitclock delay

but sound broke intervaliy

help,what else i need to change ?

over 9 years ago

0 tracy mcgrady over 9 years ago

Intellectual 520 points

here is some info

tlv320aic3101 connect a 27MHZ crystal to it's MCLK

tlv320aic3101 connect to 8168's mcasp2，and mcasp2's MCLK is also connect to this 27MHZ crystal

0 Pavel Botev over 9 years ago in reply to tracy mcgrady

TI__Guru**** 170625 points

Hi Tracy,

On DM816x TI EVM, TLV320AIC3106 MCLK is connected to a 24.576MHz clock generator. And in your custom board you replace that 24.576MHz clock generator with 27MHz?

The 24.576MHz clock generator provide clock to AIC3106 MCLK and to McASP2 ACLKHX pin.

See the below wiki page:
processors.wiki.ti.com/.../TI81XX_PSP_PM_CLOCK_FRAMEWORK_User_Guide

0 Pavel Botev over 9 years ago in reply to Pavel Botev

TI__Guru**** 170625 points

0 tracy mcgrady over 9 years ago in reply to Pavel Botev

Intellectual 520 points

hi,i was wrong.Actually in my custom board,tlv320aic3101's MCLK is provided by the 8168's AN36 which function is MCA[2]_AHCLKX/MCB_CLKR,

McASP2 Transmit High-Frequency Master Clock IO

In this case, how can i know the freqquency of MCLK???

0 Pavel Botev over 9 years ago in reply to tracy mcgrady

TI__Guru**** 170625 points

Tracy,

You can check this clock frequency with attaching a scope on pin AN36 and measure with the scope.

Other approach is to check the mcasp2_fck frequency through the linux clock framework:

In example, on my DM814x TI EVM, mcasp2_fck is 250MHz:

root@dm814x-evm:/sys/kernel/debug/clock/osc0_clkin_ck/audio_dpll_clkin_ck/audio_dpll_ck/sysclk20_ck/mcasp2_fck# cat rate

250000000

After checking the clock frequency of the mcasp2_fck, you should dump the McASP2 module registers value and check the settings there. For more details, see DM816x TRM, section 14.2.2 Clock and Frame Sync Generators

You can also provide me the values of the McASP2 AHCLKXCTL, ACLKXCTL, PFUNC, PDIR registers, I will check the settings for you.

Pavel

0 tracy mcgrady over 9 years ago in reply to Pavel Botev

Intellectual 520 points

hi,Pavel Botev
Thanks you for your help.

Finally,I get the clock rate of MCLK.

mount -t debugfs debugfs /sys/kernel/debug

cd /sys/kernel/debug/clock/sys_clkin_ck/main_pll_clk7_ck/audio_pll_clk3_ck/sysclk20_ck/mcasp2_fck

cat rate

get 24576000

mem_rdwr.out --rd 480500b4 1

0x480500b4: 00008000

AUXCLK(mcasp2_fck) equal to AHCLKX equal to MCLK.

0 Pavel Botev over 9 years ago in reply to tracy mcgrady

TI__Guru**** 170625 points

Hi Tracy,

Yes, that seems to be correct.

Regards,
Pavel

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How to change the clock frequency of tlv320aic31xx