Hi together,
I want to use the I2C interface of the OMAP3EVM of Mistral. As first steps I connected the I2C2 outputs to an I2C compatible EPROM and watch the results on an oscilloscope.
The result to see is a nice start bit, but afterwards: nothing. SDA and SCL remain high.
I tried to vary the prescaler and high/low time values PSC, SCLL and SCLH to watch the effects, ...but on the oscilloscope I can see, that the frequency of the startbit is NEVER affected. In some value sets, I achieve some signals after the startbit which seems NOT to be the awaitet slave address byte because I get sometimes 2 clockbits, sometimes 9 clockbits... even the signals sent on the data line differ dependent of the configured PSC/SCLL/SCLH combination, although it should be the slave adress which is always constant in the program. (By the way, the length of those clock-/databits is also independent from the configured timing.)
So I tried to perform a software reset of the I2C module (as described on page 2633 of the OMAP3530 TRM):
I2C2_ SYSS RDONE bit is NEVER set to 1. ...I tried to reset the module before and after enabling the module clocks... always the same result.
This is a short overview over my program:
- configure padconf (SDA, SCL) = 0x1718 (value assumed from Linux)
- enable functional & interface clocks
- config I2C timing as described in the Use case on page 2668 of the OMAP 3530 TRM : PSC=0x17, SCLL=0xD, SCLH=0xF
- enable I2C module (fast/standard mode)
- write test byte to the EPROM as described in the Use case (adapted for I2C2)
So my questions are:
...Does anyone know, why the configuration of the I2C timing results in such strange behaviour?
...Has anyone an idea, why the I2C module soft reset fails?
I would be very thankful for your advice or for any suggestion... I have simply none idea anymore...
Best regards,
Sabine
