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uPP port Tx Clock - OMAP-L138

Alexey Tsirlin
Intellectual 555 points
Other Parts Discussed in Thread: OMAP-L138

I am using uPP port of OMAP-L138 to drive parallel DAC. The problem is that minimal uPP Tx clock is DSP_Clock/64 and my designs requires transmit clock of DSP_Clock/96. As I understood from the datasheet, there is an option to use UPP_2xTXCLK in order to provide external TX clock to the module and that this clock should be 2x faster than the desired IO clock.

My idea is to generate required clock by using PWM module and insert it into UPP_2xTXCLK. But the question is if this connection will cause jitter on Tx clock output and DAC samples jitter?

  • 0
    Expert 1070 points

    One simpler solution I would think of is to interpolate your output data to match the desired output frequency. Especially if you can get a divider which is a multiple of 2 of your desired output  divider, this should be pretty easy to accomplish. If for some reason this is not possible wouldn't think the PWM approach you suggest introduces additional jitter: as long as the PWM is clocked by the same source as your CPU, the PWM is just a divided SYSCLK. If you're worried about jitter (check the datasheets on the exact numbers), then use an external oscillator with the characteristics you require.

    Good luck,

    Dirk

     

     

  • 0 in reply to Dirk Buijsman
    Intellectual 555 points

    Thank you for you answer, interpolation is a good solution, but it requires additional calculation power (I would also think about just repeating each sample twice, so it wouldn't require too much additional calculating power, but still will require double buffers size).

    Regarding the jitter issue, wouldn't it depend on the PCB layout of the connection between the PWM out and 2xClock in?

    Another question is, how external oscillator can help me? Once and external oschillator will be used to clock the 2xTxClock pin, it will defenetly produce jitter as the clocks won't be synchronized in any way.

     

    Thanks, Alexey.

  • 0 in reply to Alexey Tsirlin
    Expert 1070 points

    The uPP is an asynchronous peripheral: it has a seperate clock for internal logic and transmission. There are some clock constraints, like the Tx clock should be < 0.5 * CPU clock. This allows you to completely separate the transmission timing and actual data transfer (the transfer from memory to transmission buffer in the peripheral internally, see page 10 of the uPP manual).

    I don't see how jitter can be an issue actually. It seems to me that uPP works like any other asynchronous peripheral, otherwise it wouldn't be much use for use with DACs. Your PWM solution should work perfectly. The jitter in the PWM clock is purely a function of the jitter in the original oscillator. PCB routing does not affect jitter that I am aware of, unless you have some very noisy other signals running adjacent which can affect it.